Universal Serial Bus Current Limit

Abstract

A load device includes a power input having an interface to a power supply; a peripheral power bus including an internal capacitance, and an active switch coupled to the power input and the peripheral power bus for applying power from the power input to the peripheral power bus. The load device also includes a switch controller coupled to the active switch for regulating the in-rush current drawn by the internal capacitance through the active switch while the internal capacitance is being charged.

What is claimed is: 
     
         1 . A load device, comprising:
 a system power bus having a universal serial bus (USB) interface;   a peripheral power bus;   an active switch coupled to the system power bus and the peripheral power bus for applying power from the system power bus to the peripheral power bus and for controlling a plurality of operation intervals of the active switch; and   a switch controller coupled to the active switch, the switch controller cyclically opening and closing the active switch by applying a periodic gate signal during a first operational interval of the plurality of operational intervals, the periodic gate signal comprising a plurality of pulses, so as to limit the current drawn by the peripheral power bus to be within USB standard limits, and the switch controller maintaining the active switch fully on during a second operational interval of the plurality of operational intervals.   
     
     
         2 . The load device of  claim 1 , wherein the second operational interval begins when one or more capacitors in communication with the peripheral power bus have charged up to a predetermined voltage level. 
     
     
         3 . The load device of  claim 1 , wherein the applied periodic gate signal is further determined to maintain an instantaneous voltage at the system bus above a predetermined lower limit. 
     
     
         4 . The load device of  claim 1 , wherein the applied periodic gate signal is further determined to bring at least one capacitor in communication with the peripheral power bus up to a predetermined voltage level. 
     
     
         5 . The load device of  claim 3 , wherein the pulse-width is predetermined to maintain the instantaneous voltage at the system bus above the predetermined lower limit. 
     
     
         6 . The load device of  claim 1 , wherein the load comprises a portable computing device. 
     
     
         7 . The load device of  claim 1 , wherein the instantaneous voltage at the system power bus is maintained below an instantaneous voltage of the peripheral power bus. 
     
     
         8 . In a load comprising a system power bus having a universal serial bus (USB) interface, a peripheral power bus, and an active switch for applying power from the system power bus to the peripheral power bus and for controlling a plurality of operational intervals of the active switch, a method comprising:
 applying a periodic gate signal to the active switch input, the periodic gate signal determined to cyclically open and close the active switch during a first operational interval of the plurality of operational intervals, the periodic gate signal comprising a plurality of pulses, so as to limit the current drawn to be within USB standard limits, and   maintaining the active switch fully on during a second operational interval of the plurality of intervals.   
     
     
         9 . The method of  claim 8 , wherein the second operational interval begins when one or more capacitors in communication with the peripheral power bus have charged up to a predetermined voltage level. 
     
     
         10 . The method of  claim 8 , wherein the applied periodic gate signal is further determined to maintain an instantaneous voltage at the system bus above a predetermined lower limit. 
     
     
         11 . The method of  claim 8 , further comprising determining the applied gate signal such that one or more capacitors in communication with the peripheral power bus are charged up to a predetermined voltage level. 
     
     
         12 . The method of  claim 10 , wherein a pulse-width of the plurality of pulses is predetermined to maintain the instantaneous voltage at the system bus above the predetermined lower limit. 
     
     
         13 . The method of  claim 8 , wherein the load comprises a portable computing device. 
     
     
         14 . A computer-readable medium including computer processing instructions for a processing unit of a portable computing device, the portable computing device comprising a system power bus having a universal serial bus (USB) interface, a peripheral power bus, and an active switch coupled to the system power bus and the peripheral power bus for applying power from the system power bus to the peripheral power bus and for controlling a plurality of operational intervals of the active switch, the computer processing instructions when executed by the processing unit causing the portable computing device to:
 cyclically open and close the active switch during a first operational interval of the plurality of intervals by applying a periodic gate signal , the periodic gate signal comprising a plurality of pulses, all of the pulses having substantially identical pulse-width, to limit the current drawn by the peripheral power bus to be within USB standard limits, and   maintain the active switch fully on during a second operational interval of the plurality of operational intervals.   
     
     
         15 . The computer-readable medium of  claim 14 , wherein the second operational interval begins when one or more capacitors in communication with the peripheral power bus have charged up to a predetermined voltage level. 
     
     
         16 . The computer-readable medium of  claim 14 , wherein the applied periodic gate signal is further determined to maintain an instantaneous voltage at the system bus above a predetermined lower limit. 
     
     
         17 . The computer-readable medium of  claim 16 , wherein the pulse-width is predetermined to maintain the instantaneous voltage at the system bus above the predetermined lower limit. 
     
     
         18 . The computer-readable medium of  claim 14 , wherein the computer processing instructions further cause the portable computing device to cyclically open and close the active switch with the periodic gate signal until the one or more capacitors have charged up to a predetermined voltage level. 
     
     
         19 . The computer-readable medium of  claim 14 , wherein the instantaneous voltage at the system power bus is maintained below an instantaneous voltage of the peripheral power bus.