Tunable transconductance-capacitance filter with coefficients independent of variations in process corner, temperature, and input supply voltage

Abstract

A transconductance-capacitance (G m -C) filter of arbitrary order is provided that is biased by a bias circuit such that the G m -C filter is robust to variations in process corner and temperature as well as input supply noise. The bias circuit includes a biased transistor that has a width-to-length ratio that is a factor X times larger than a corresponding transistor in the G m -C filter. The biased transistor couples to ground through a switched capacitor circuit.

I claim: 
     
         1 . A bias circuit to bias the transconductance g m  of a first transistor within a G m -C filter, comprising:
 a second transistor having a width-to-length ratio that is a factor X larger than a width-to-length ratio for the first transistor, the second transistor coupling to ground through a switched capacitor circuit such that g m  is proportional to (1−1/X 1/2 ).   
     
     
         2 . The bias circuit of  claim 1 , wherein a gate of the first transistor is biased by a control voltage that equals a gate voltage for the second transistor. 
     
     
         3 . The bias circuit of  claim 2 , wherein the switched capacitor circuit is driven by a clock and a complement clock of frequency f ck  and has a capacitor of capacitance C ck , whereby the switched capacitor circuit provides a resistance of 1/f ck C ck . 
     
     
         4 . The bias circuit of  claim 3 , wherein the control voltage drives a gate of a third transistor that matches the first transistor. 
     
     
         5 . The bias circuit of  claim 4 , wherein the third transistor is diode connected. 
     
     
         6 . The bias circuit of  claim 5 , wherein a drain of the first transistor couples to a source of a diode-connected fourth transistor, a drain of the fourth transistor coupling to a power supply voltage node.