Re-configurable mixed-mode integrated circuit architecture

Abstract

An analog portion of a mixed-mode integrated circuit system includes a plurality of analog input cells, a plurality of analog output cells, and an interconnect array. The input cells are configured to program analog functions. The output cells are configured to provide Analog and digital outputs corresponding to the programmed analog functions. The interconnect array processes the programmed analog functions into signals indicative of the analog functions. The interconnect array selectively provides the signals to the plurality of analog output cells.

What is claimed is: 
     
         1 . A mixed-mode integrated circuit system, comprising:
 a plurality of analog input cells configured to program analog functions;   a plurality of analog output cells configured to provide digital and/or analog outputs corresponding to said programmed analog functions;   an interconnect array to process said programmed analog functions into signals indicative of said analog functions, said interconnect array selectively providing said signals to said plurality of analog output cells; and   a programmable digital portion.   
     
     
         2 . The system of  claim 1 , further comprising:
 a voltage-to-current converter to convert said programmed analog functions from voltage to current prior to being directed to the interconnect array for processing.   
     
     
         3 . The system of  claim 1 , further comprising:
 a current-to-voltage converter to convert said signals indicative of said analog functions from current to voltage prior to being directed to said plurality of analog output cells.   
     
     
         4 . The system of  claim 1 , wherein said interconnect array is configured to enable mixing of one or more of said programmed analog functions into one analog output cell. 
     
     
         5 . The system of  claim 1 , wherein said interconnect array is configured to enable splitting of one programmed analog function into one or more analog output cells. 
     
     
         6 . The system of  claim 1 , wherein said interconnect array is configured in a matrix format to select between mixing of one or more of said programmed analog functions into one analog output cell and splitting of one programmed analog function into one or more analog output cells. 
     
     
         7 . The system of  claim 1 , further comprising:
 a plurality of direct analog inputs to allow input of analog signals into said interconnect array.   
     
     
         8 . The system of  claim 1 , further comprising:
 a voltage reference generator to provide voltage references to the analog input and output cells.   
     
     
         9 . The system of  claim 1 , wherein one of said plurality of analog input cells includes transistors, capacitors, adjustable resistors, configurations switches, and an operational amplifier to program a desired analog function. 
     
     
         10 . The system of  claim 1 , wherein said analog input cell further includes a multiplexer to receive an input signal from an adjacent input cell, said multiplexer enabling cascading of analog functions to program complex functions. 
     
     
         11 . The system of  claim 1 , wherein one of said plurality of analog output cells includes an interconnect matrix to enable selection of inputs from adjacent input cell to allow direct input of programmed analog function directly from the analog input cell, and from said interconnect array. 
     
     
         12 . The system of  claim 1 , wherein one of said plurality of analog output dells includes a comparator to convert the programmed analog functions into digital signal. 
     
     
         13 . The system of  claim 1 , wherein said programmable digital portion includes a programmable logic device or Field Programmable Gate Array (FPGA) 
     
     
         14 . The system of  claim 1 , wherein said programmable digital portion includes digital macrocells. 
     
     
         15 . A system, comprising:
 re-configurable input cells to select and program analog functions; and   programmable output cells to receive said programmed analog functions and to provide digital and/or analog output signals corresponding to said programmed analog functions.   
     
     
         16 . The system of  claim 15 , further comprising:
 a programmable array to process said analog functions in a matrix format by combining signals from said re-configurable input cells, and directing the processed signals to the programmable output cells.   
     
     
         17 . The system of  claim 16 , wherein the programmable array includes a plurality of voltage-to-current converters to convert the output of the analog input function from voltage to current prior to processing. 
     
     
         18 . The system of  claim 17 , further comprising:
 a plurality of current-to-voltage converters to convert said processed signals from current to voltage prior to directing to the programmable output cells.   
     
     
         19 . A system, comprising:
 a plurality of analog input cells to provide a plurality of predefined analog functions;   a plurality of analog output cells to generate digital and/or analog output signals corresponding to said predefined analog functions; and   a current sensing array to convert predefined analog functions from said plurality of analog input cells into current signal, to mix and direct said current signal, to convert said current signal into voltage signal, and to selectively provide said voltage signal to said plurality of analog output cells.   
     
     
         20 . The system of  claim 19 , wherein said current sensing array is configured to select between mixing of one or more of said predefined analog functions into one analog output cell and splitting of one predefined analog function into one or more analog output cell.