Graphene electronic device and method of fabricating the same

Abstract

A graphene electronic device may include a silicon substrate, connecting lines on the silicon substrate, a first electrode and a second electrode on the silicon substrate, and an interlayer dielectric on the silicon substrate. The interlayer dielectric may be configured to cover the connecting lines and the first and second electrodes and the interlayer dielectric may be further configured to expose at least a portion of the first and second electrodes. The graphene electronic device may further include an insulating layer on the interlayer dielectric and a graphene layer on the insulating layer, the graphene layer having a first end and a second end. The first end of the graphene layer may be connected to the first electrode and the second end of the graphene layer may be connected to the second electrode.

What is claimed is: 
     
         1 . A method of fabricating a graphene electronic device, the method comprising:
 forming connecting lines, a first electrode, and a second electrode on a silicon substrate;   forming an interlayer dielectric on the silicon substrate to cover the connecting lines and partially expose the first and second electrodes;   forming an insulating layer on the interlayer dielectric; and   forming a graphene layer on the insulating layer, the graphene layer having a first end connected to the first electrode and a second end connected to the second electrode.   
     
     
         2 . The method of  claim 1 , wherein forming the graphene layer includes
 forming via holes in the insulating layer in region of the insulating layer corresponding to the first and second electrodes;   filling the via holes with contact metal; and   forming the graphene layer so as to contact the contact metal.   
     
     
         3 . The method of  claim 1 , wherein forming the graphene layer includes
 forming via holes in the insulating layer in a region above the first and second electrodes;   filling the via holes with contact metal;   forming the graphene layer so as to contact the contact metal; and   covering the first and second ends of the graphene layer with metal to form two electrode pads.   
     
     
         4 . The method of  claim 2 , wherein the contact metal is gold (Au). 
     
     
         5 . The method of  claim 1 , wherein the graphene layer is formed by transferring the graphene layer. 
     
     
         6 . The method of  claim 5 , wherein the graphene layer has one of a single layered structure and a bi-layered structure. 
     
     
         7 . The method of  claim 1 , further comprising:
 forming a gate electrode on the silicon substrate and between the first and second electrodes.   
     
     
         8 . The method of  claim 1 , further comprising:
 forming a passivation layer that covers the graphene layer on the first insulating layer; and   exposing the graphene layer by patterning the passivation layer.   
     
     
         9 . The method of  claim 8 , wherein the passivation layer is formed of PDMS polymer. 
     
     
         10 . The method of  claim 1 , wherein the graphene layer has one of a single layered structure and a bi-layered structure.