Integrated Circuit Devices Including Device Isolation Structures and Methods of Fabricating the Same

Abstract

An integrated circuit device includes a substrate having adjacent first and second regions, and a device isolation structure in the substrate between the first and second regions. The first and second regions of the substrate may respectively include transistors configured to be driven at different operational voltages, and the device isolation structure may electrically separates the transistors of the first region from the transistors of the second region. The device isolation structure includes outer portions immediately adjacent to the first and second regions and an inner portion therebetween. The outer portions of the device isolation structure comprise a material having an etching selectivity with respect to that of the inner portion. Related devices and fabrication methods are also discussed.

What is claimed is: 
     
         1 . An integrated circuit device, comprising:
 a substrate including adjacent first and second regions; and   a device isolation structure in the substrate between the first and second regions,   wherein the device isolation structure comprises outer portions immediately adjacent to the first and second regions and an inner portion therebetween, wherein the outer portions of the device isolation structure comprise a material having an etching selectivity with respect to that of the inner portion.   
     
     
         2 . The device of  claim 1 , wherein the first and second regions of the substrate respectively include transistors configured to be driven at different operational voltages, and wherein the device isolation structure electrically separates the transistors of the first region from the transistors of the second region. 
     
     
         3 . The device of  claim 2 , wherein the outer portions of the device isolation structure comprise first and second insulating layers extending into respective trenches in the substrate, and wherein the inner portion comprises a guard ring region extending between the first and second insulating layers. 
     
     
         4 . The device of  claim 3 , wherein the guard ring region comprises a portion of the substrate extending between the respective trenches including the first and second insulating layers therein. 
     
     
         5 . The device of  claim 4 , wherein the guard ring region has a different conductivity type than well portions of the first and/or second regions of the substrate. 
     
     
         6 . The device of  claim 3 , wherein the device isolation structure completely surrounds the first region of the substrate in plan view to electrically separate the first region from the second region of the substrate. 
     
     
         7 . The device of  claim 3 , wherein the first and second regions of the substrate respectively include first and second gate insulating layers thereon, and wherein the first and second gate insulating layers have different thicknesses. 
     
     
         8 . The device of  claim 7 , wherein the guard ring region comprises a material having an etching selectivity with respect to that of the first and second gate insulating layers. 
     
     
         9 . The device of  claim 7 , wherein a boundary between the first and second gate insulating layers is provided on the guard ring region. 
     
     
         10 . The device of  claim 7 , wherein the transistors of the first region include the first gate insulating layer and are driven at first operational voltage, wherein the transistors of the second region include the second gate insulating layer and are driven at a second operational voltage greater than the first operational voltage, and wherein a second thickness of the second gate insulating layer is greater than a first thickness of the first gate insulating layer. 
     
     
         11 . The device of  claim 2 , wherein the substrate includes a third region including transistors thereon configured to be driven at a third operational voltage that is greater than the first and second operational voltages, and further comprising:
 a second device isolation structure in the substrate between the second and third regions.   
     
     
         12 . The device of  claim 11 , wherein the second device isolation structure comprises outer portions immediately adjacent to the second and third regions and an inner portion therebetween, wherein the outer portions of the second device isolation structure comprise a material having an etching selectivity with respect to that of the inner portion.