Graphics card device
Abstract
A graphics card device includes a memory module, a graphic processing unit (GPU), a controller, a detection circuit, and a port. The GPU is electronically connected to the memory module and receives graphic data. The detection circuit determines a proportion of the graphics data occupying the memory module, and sends the proportion of the graphics that are occupying the memory module to the controller. The controller divides the memory module into a first storage space and a second storage space according to the determination. The first storage space stores graphic data received by the GPU, and the second storage space stores external data transmitted by the port.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A graphics card device, comprising:
a memory module; a graphic processing unit (GPU) electronically connected to the memory module, and receiving graphic data; a controller electronically connected to the memory module and the GPU; a detection circuit electronically connected to the GPU and the controller; and a port electronically connected to the controller, and configured to receive external data; wherein the detection circuit determines a proportion of the graphics data occupying the memory module, and sends the determination of the proportion to the controller, the controller divides the memory module into a first storage space and a second storage space according to the determination, the first storage space stores the graphic data received by the GPU, and the second storage space stores external data transmitted by the port.
2 . The graphics card device as claimed in claim 1 , wherein the controller feeds back the division of the memory module to the GPU to allow the GPU to access the first storage space.
3 . The graphics card device as claimed in claim 2 , wherein the GPU writes the graphics data in the first storage space, and reads the graphics data from the first storage space.
4 . The graphics card device as claimed in claim 1 , wherein the memory module includes several storage blocks, the controller divides the several storage blocks to allow at least one storage block to serve as the first storage space, and to allow the other storage blocks to serve as the second storage space.
5 . The graphics card device as claimed in claim 1 , wherein the port is a universal serial bus (USB) port.
6 . The graphics card device as claimed in claim 1 , wherein the controller is a field programmable gate array (FPGA).
7 . The graphics card device as claimed in claim 1 , wherein the detection circuit calculates a total capacity of the graphics data received by the GPU.
8 . A graphics card device, comprising:
a memory module comprising several storage blocks; a graphic processing unit (GPU) electronically connected to the memory module, and receiving graphic data; a controller electronically connected to the memory module and the GPU; a detection circuit electronically connected to the GPU and the controller; and a port electronically connected to the controller, and configured to receive external data; wherein the detection circuit determines a proportion of the graphics data occupying the memory module, and sends the determination of the proportion to the controller, the controller divides the memory module according to the determination, to allow at least one storage block to store graphic data received by the GPU, and to allow the other storage blocks to store the external data transmitted by the port.
9 . The graphics card device as claimed in claim 8 , wherein the controller feeds back the division of the memory module to the GPU to allow the GPU to access the at least one storage block.
10 . The graphics card device as claimed in claim 9 , wherein the GPU writes the graphics data in the at least one storage block, and reads the graphics data from the at least one storage block.
11 . The graphics card device as claimed in claim 8 , wherein the port is a universal serial bus (USB) port.
12 . The graphics card device as claimed in claim 8 , wherein the controller is a field programmable gate array (FPGA).
13 . The graphics card device as claimed in claim 8 , wherein the detection circuit calculates a total capacity of the graphics data received by the GPU.Join the waitlist — get patent alerts
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