Heterogeneous Parallel Primitives Programming Model

Abstract

With the success of programming models such as OpenCL and CUDA, heterogeneous computing platforms are becoming mainstream. However, these heterogeneous systems are low-level, not composable, and their behavior is often implementation defined even for standardized programming models. In contrast, the method and system embodiments for the heterogeneous parallel primitives (HPP) programming model disclosed herein provide a flexible and composable programming platform that guarantees behavior even in the case of developing high-performance code.

What is claimed is: 
     
         1 . A method comprising:
 encapsulating an initially unknown result that will become an available result after an asynchronous task is executed;   executing the asynchronous task on a grid; and   assigning the available result to the asynchronous task in response to the result becoming available during the executing.   
     
     
         2 . The method of  claim 1 , further comprising:
 using the asynchronous task to enable task and data parallelism in a heterogeneous computing platform.   
     
     
         3 . The method of  claim 1 , further comprising:
 declaring the asynchronous task using an object oriented programming language.   
     
     
         4 . A system for executing an asynchronous task, comprising:
 a heterogeneous computing platform including at least one GPU processor and configured to:
 encapsulate an initially unknown result that will become an available result after the asynchronous task is executed; 
 execute the asynchronous task on a grid; and 
 assign the available result to the asynchronous task in response to the result becoming available during the execution. 
   
     
     
         5 . The system of  claim 4 , further comprising a task parallel runtime configured to use the asynchronous task to enable task and data parallelism its the heterogeneous computing platform. 
     
     
         6 . The system of  claim 4 , wherein the heterogeneous computing platform is further configured to declare the asynchronous task using an object oriented programming language. 
     
     
         7 . A method comprising:
 generating an unbound distributed array in a plurality of memories of different types associated with a heterogeneous computing platform;   binding the distributed array for a kernel configured to execute a workgroup on a processor in the heterogeneous computing platform; and   accessing the distributed array bound to the kernel as the kernel executes the workgroup.   
     
     
         8 . The method of  claim 7 , further comprising:
 generalizing the plurality of memories of different types into a persistent global address space (PGAS) abstraction; and   receiving an indication from the kernel for managing a region in the PGAS abstraction.   
     
     
         9 . The method of  claim 7 , wherein a memory in the plurality of memories is a global chip memory. 
     
     
         10 . The method of  claim 7 , wherein the memory is a cache memory. 
     
     
         11 . The method of  claim 7 , further comprising:
 allocating a plurality of regions and a plurality of segments within the distributed array.   
     
     
         12 . The method of  claim 11 , wherein the accessing further comprises:
 accessing a region in a plurality of regions using a workgroup ID index associated with the workgroup.   
     
     
         13 . The method of  claim 12 , wherein:
 the workgroup further comprises a plurality of workitems, and   the workgroup ID index identifies a workitem in the plurality of workitems.   
     
     
         14 . The method of  claim 11 , further comprising:
 moving the plurality of regions in the distributed array to the scratch pad memory on the GPU device.   
     
     
         15 . The method of  claim 7 , further comprising:
 performing a cache memory prefetching for the distributed array on a CPU.   
     
     
         16 . A system comprising:
 a heterogeneous parallel primitives (HPP) platform configured to:
 generate an unbound distributed array in a plurality of memories of different types; 
 bind the distributed array to a kernel configured to execute a workgroup on a processor in a heterogeneous computing platform; and 
 access the distributed array bound to the kernel as the kernel executes the workgroup. 
   
     
     
         17 . The system of  claim 16 , wherein the HPP platform is further configured to:
 generalize the plurality of memories of different types into a persistent global address space (PGAS) abstraction; and   receive an indication from the kernel for managing a region in the PGAS abstraction.   
     
     
         18 . The system of  claim 16 , wherein a memory in the plurality of memories is a global chip memory. 
     
     
         19 . The system of  claim 16 , wherein the memory is a cache memory. 
     
     
         20 . The system of  claim 16 , wherein the HPP platform is further configured to:
 allocate a plurality of regions and a plurality of segments within the distributed array.   
     
     
         21 . The system of  claim 20 , wherein the HPP platform is further configured to:
 access a region in the plurality of regions using a workgroup ID index associated with the workgroup.   
     
     
         22 . The system of  claim 21 , wherein:
 the workgroup further comprises a plurality of workitems, and   the workgroup ID index identifies a workitem in the plurality of workitems.   
     
     
         23 . The system of  claim 20 , wherein the HPP platform is further configured to:
 move the plurality of regions in the distributed array to the scratch pad memory on the CPU device.   
     
     
         24 . The system of  claim 16 , wherein the HPP platform is further configured to:
 perform a cache memory prefetching for the distributed array on a CPU.