Oxide for semiconductor layer of thin-film transistor, semiconductor layer of thin-film transistor having said oxide, and thin-film transistor
Abstract
The oxide of the present invention for thin-film transistors is an In—Zn—Sn-based oxide containing In, Zn, and Sn, wherein when the respective contents (atomic %) of metal elements contained in the In—Zn—Sn-based oxide are expressed by [Zn], [Sn], and [In], the In—Zn—Sn-based oxide fulfills the following expressions (2) and (4) when [In]/([In]+[Sn])≦0.5; or the following expressions (1), (3), and (4) when [In]/([In]+[Sn])≧0.5. [In]/([In]+[Zn]+[Sn])≦0.3 - - - (1), [In]/([In]+[Zn]+[Sn])≦1.4×{[Zn]/([Zn]+[Sn])}−0.5 - - - (2), [Zn]/([In]+[Zn]+[Sn])≦0.83 - - - (3), and 0.1≦[In]/([In]+[Zn]+[Sn]) - - - (4). According to the present invention, oxide thin films for thin-film transistors can be obtained, which provide TFTs with excellent switching characteristics, and which have high sputtering rate in the sputtering and properly controlled etching rate in the wet etching.
Claims
exact text as granted — not AI-modified1 . An In—Zn—Sn-based oxide comprising In, Zn, and Sn, wherein when respective contents, in atomic %, of metal elements Zn, Sn, and In in the In—Zn—Sn-based oxide are expressed by [Zn], [Sn], and [In], the In—Zn—Sn-based oxide satisfies:
(a) expressions (2) and (4) when [In]/([In]+[Sn])≦0.5:
[In]/([In]+[Zn]+[Sn])≦1.4×{[Zn]/([Zn]+[Sn])}−0.5 (2)
and
0.1≦[In]/([In]+[Zn]+[Sn]) (4)
or
(b) expressions (1), (3), and (4) when [In]/([In]+[Sn])>0.5:
[In]/([In]+[Zn]+[Sn])≦0.3 (1)
[Zn]/([In]+[Zn]+[Sn])≦0.83 (3)
and
0.1≦[In]/([In]+[Zn]+[Sn]) (4).
2 . The In—Zn—Sn-based oxide of claim 1 , which is an oxide formed by a sputtering method wherein an oxygen partial pressure is 18% or lower.
3 . The In—Zn—Sn-based oxide of claim 1 , wherein the In—Zn—Sn-based oxide has a thickness of 30 to 200 nm.
4 . A semiconductor layer of a thin-film transistor comprising the In—Zn—Sn-based oxide of claim 1 , wherein the semiconductor layer has an electronic carrier concentration in a range of 10 15 to 10 18 cm −3 .
5 . The semiconductor layer of a thin-film transistor of claim 4 , wherein the semiconductor layer is obtained by a heating treatment of the In—Zn—Sn-based oxide at 250° C. to 350° C. for 15 to 120 minutes.
6 . A thin-film transistor comprising the In—Zn—Sn-based oxide of claim 1 as a semiconductor layer of the thin-film transistor.
7 . A display device comprising the thin-film transistor of claim 6 .
8 . An In—Zn—Sn-based oxide sputtering target comprising In, Zn, and Sn, wherein when respective contents, in atomic %, of metal elements Zn, Sn, and In in the In—Zn—Sn-based oxide sputtering target are expressed by [Zn], [Sn], and [In], the In—Zn—Sn-based oxide sputtering target satisfies:
(a) expressions (2) and (4) when [In]/([In]+[Sn])≦0.5:
[In]/([In]+[Zn]+[Sn])≦1.4×{[Zn]/([Zn]+[Sn])}−0.5 (2)
and
0.1≦[In]/([In]+[Zn]+[Sn]) (4)
or
(b) expressions (1), (3), and (4) when [In]/([In]+[Sn])>0.5:
[In]/([In]+[Zn]+[Sn])≦0.3 (1)
[Zn]/([In]+[Zn]+[Sn])≦0.83 (3)
and
0.1≦[In]/([In]+[Zn]+[Sn]) (4).
9 . The In—Zn—Sn-based oxide of claim 1 , satisfying (a):
[In]/([In]+[Sn])≦0.5,
[In]/([In]+[Zn]+[Sn])≦1.4×{[Zn]/([Zn]+[Sn])}−0.5 (2)
and
0.1≦[In]/([In]+[Zn]+[Sn]) (4).
10 . The In—Zn—Sn-based oxide of claim 1 , satisfying (b):
[In]/([In]+[Sn])>0.5,
[In]/([In]+[Zn]+[Sn])≦0.3 (1)
[Zn]/([In]+[Zn]+[Sn])≦0.83 (3)
and
0.1≦[In]/([In]+[Zn]+[Sn]) (4).
11 . The In—Zn—Sn-based oxide of claim 9 , wherein the In—Zn—Sn-based oxide has a thickness of 30 to 200 nm.
12 . The In—Zn—Sn-based oxide of claim 10 , wherein the In—Zn—Sn-based oxide has a thickness of 30 to 200 nm.
13 . A semiconductor layer of a thin-film transistor comprising the In—Zn—Sn-based oxide of claim 9 , wherein the semiconductor layer has an electronic carrier concentration in a range of 10 15 to 10 18 cm −3 .
14 . A semiconductor layer of a thin-film transistor comprising the In—Zn—Sn-based oxide of claim 10 , wherein the semiconductor layer has an electronic carrier concentration in a range of 10 15 to 10 18 cm −3 .
15 . The In—Zn—Sn-based oxide of claim 1 , which is suitable for use as a semiconductor layer of a thin film transistor.Join the waitlist — get patent alerts
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