US2014025912A1PendingUtilityA1
Efficiency of Hardware Memory Access using Dynamically Replicated Memory
Est. expiryNov 18, 2029(~3.4 yrs left)· nominal 20-yr term from priority
G06F 3/0673G06F 11/1666G06F 3/0683G06F 12/1027G06F 3/0653G06F 3/065G06F 11/1076G06F 3/061G06F 11/1008G06F 3/064G06F 3/0619
55
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Claims
Abstract
Dynamically replicated memory is usable to allocate new memory space from failed memory pages by pairing compatible failed memory pages to reuse otherwise unusable failed memory pages. Dynamically replicating memory involves detecting and recording memory faults, reclaiming failed memory pages for later use, recovering from detected memory faults, and scheduling access to replicated memory pages.
Claims
exact text as granted — not AI-modified1 . (canceled)
2 . One or more computer-readable storage media, storing computer-executable instructions that, when executed, configure a processor to perform acts for improving memory access performance, the acts comprising:
determining a replication policy to follow comprising selecting a lazy replication policy; replicating a memory page to create a duplicate memory page, the memory page and the duplicate memory page containing data; receiving a memory access request from a memory controller; and accessing the data of the memory page and the duplicate memory page.
3 . The one or more computer-readable storage media of claim 1 , wherein accessing the data of the memory page and the duplicate memory page comprises:
placing a memory access request for the data of the memory page in a transaction queue; and receiving the data of the memory page at the memory controller prior to placing a memory access request for the data of the duplicate memory page.
4 . The one or more computer-readable storage media of claim 2 , wherein accessing the data of the memory page and the duplicate memory page further comprises:
checking a parity bit of the data of the memory page; and placing the memory access request for the data of the duplicate memory page only when the parity bit of the data of the memory page signals a memory fault.
5 . The one or more computer-readable storage media of claim 2 , wherein the memory access request from the memory controller comprises:
on a read request, storing the data of the memory page in a computer-readable storage medium only if the data of the memory page is non-faulty and storing the data of the duplicate memory page in a computer-readable storage medium only if the data of the duplicate memory page is non-faulty.
6 . The one or more computer-readable storage media of claim 1 , wherein replicating a memory page to create a duplicate memory page comprises creating a plurality of duplicate memory pages.
7 . The one or more computer-readable storage media of claim 1 , wherein the memory page and the duplicate memory are located on different memory banks.
8 . The one or more computer-readable storage media of claim 1 , wherein the memory page comprises phase change memory.
9 . The one or more computer-readable storage media of claim 1 , wherein replicating the memory page is done dynamically as errors are found.
10 . A system comprising:
memory and one or more processors; data access functionality stored in the memory and executable on the one or more processors for improving replicated memory access performance, comprising: a memory replication module to replicate a memory page to create a primary memory page and a duplicate memory page, the primary memory page and the duplicate memory page containing data; a memory controller module to make memory write requests; and a transaction queue module to store memory write requests.
11 . The system of claim 9 , wherein the memory controller module is further configured to:
insert a data write request for the primary memory page in the transaction queue immediately prior to inserting a data write request for the duplicate memory page in the transaction queue; receive the data of the primary memory page and the data of the duplicate memory page; check a parity bit of the data of the primary and duplicate memory pages; and remove the data write request for the primary memory page from the transaction queue.
12 . The system of claim 10 , wherein the memory controller module is further configured to:
remove the data write request for the duplicate memory page from the transaction queue.
13 . The system of claim 9 , wherein the primary memory page is located on a different memory bank than the duplicate memory page.
14 . The system of claim 9 , wherein the memory comprises phase change memory.
15 . A computer implemented method for improving memory access performance, the method comprising:
determining a replication policy to follow comprising selecting a lazy replication policy; replicating a memory page to create a duplicate memory page, the memory page and the duplicate memory page containing data; receiving a memory access request from a memory controller; and requesting access to the data of the memory page and the duplicate memory page, wherein the access comprises:
placing a memory access request for the data of the memory page in a transaction queue; and
receiving the data of the memory page at the memory controller prior to placing a memory access request for the data of the duplicate memory page.
16 . The method of claim 14 , wherein accessing the data of the memory page and the duplicate memory page further comprises:
checking a parity bit of the data of the memory page; and placing the memory access request for the data of the duplicate memory page only when the parity bit of the data of the memory page signals a memory fault.
17 . The method of claim 14 , wherein the memory access request from the memory controller comprises:
on a read request, storing the data of the memory page in a computer-readable storage medium only if the data of the memory page is non-faulty and storing the data of the duplicate memory page in a computer-readable storage medium only if the data of the duplicate memory page is non-faulty.
18 . The method of claim 14 , wherein replicating a memory page to create a duplicate memory page comprises creating a plurality of duplicate memory pages.
19 . The method of claim 14 , wherein the memory page and the duplicate memory are located on different memory banks.
20 . The method of claim 14 , wherein the memory page comprises phase change memory.
21 . The method of claim 14 , wherein replicating the memory page is done dynamically as errors are found.Cited by (0)
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