Thin film transistor liquid crystal display array substrate and manufacturing method thereof
Abstract
A TFT LCD array substrate and a manufacturing method thereof. The manufacturing method steps are: forming a thin film transistor on a substrate to form a gate line and a gate electrode connected with the gate line on the substrate; forming a gate insulating layer and a semiconductor layer on the gate electrode; forming an ohmic contact layer on the semiconductor layer; forming a transparent pixel electrode layer and a source/drain electrode metal layer in sequence on the resultant substrate, wherein the transparent pixel electrode layer is electrically insulated from the gate line and the gate electrode, and the transparent pixel electrode layer forms an ohmic contact with two sides of the semiconductor layer via the ohmic contact layer; and performing masking and etching with a gray tone mask with respect to the resultant substrate to form a transparent pixel electrode, a source/drain electrode and a data line simultaneously.
Claims
exact text as granted — not AI-modified1 - 2 . (canceled)
3 . A method of manufacturing a TFT LCD array substrate, comprising the steps of:
1) depositing a gate metal layer on a substrate, then performing masking and etching to obtain a gate line and a gate electrode connected with the gate line; 2) depositing a gate insulating layer, a semiconductor layer, and an ohmic contact layer on the resultant substrate after step 1, and then performing masking and etching to form a thin film transistor; 3) depositing a transparent pixel electrode layer and a source/drain electrode layer on the resultant substrate after step 2, and then performing a masking with a gray tone mask to form a transparent pixel electrode, a source/drain electrode and a channel for the TFT; and 4) depositing a passivation layer on the resultant substrate after step 3, then performing masking and etching to form via holes and provide protection for the channels, with pad being exposed therein.
4 . The method according to claim 3 , wherein, during the step of masking with the gray tone mask in step 3, a partially transparent portion of the gray tone mask corresponds to the transparent pixel electrode to be formed, a opaque portion of the gray tone mask to the source/drain electrode and the data line to be formed, and a completely transparent portion of the gray tone mask to remaining portion of the substrate.
5 . The method according to claim 3 , wherein the ohmic contact layer deposited in the step 2 is a μc-Si layer.
6 . The method according to claim 3 , wherein the transparent pixel electrode layer and source/drain electrode metal layer are deposited sequentially in the same or different equipment in the step 3.
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