Electroplated Metallic Interconnects And Products

Abstract

One embodiment of the present invention is a device including at least a portion of a void-free electroplated metallic interconnect embedded in an opening, said opening having sidewalls, said sidewalls include at least one dielectric layer, wherein the opening has an aspect ratio in a range from 7:1 to 20:1, and wherein the portion of the electroplated metallic interconnect includes a material selected from a group consisting of Cu, Ag, and alloys including at least one of these metals.

What I claim is: 
     
         1 . A device comprising at least a portion of a void-free electroplated metallic interconnect embedded in an opening, said opening having sidewalls, said sidewalls comprising at least one dielectric layer, wherein the opening has an aspect ratio in a range from 7:1 to 20:1, and wherein the portion of the electroplated metallic interconnect comprises a material selected from a group consisting of Cu, Ag, and alloys comprising at least one of these metals. 
     
     
         2 . The device of  claim 1 , further comprising at least one seed layer disposed between the embedded portion of the electroplated metallic interconnect and the sidewalls of the opening. 
     
     
         3 . The device of  claim 2 , further comprising one or more barrier layers disposed between the at least one seed layer and the sidewalls of the opening. 
     
     
         4 . The device of  claim 3 , wherein at least one seed layer comprises a continuous PVD seed layer over the sidewalls of the opening. 
     
     
         5 . The device of  claim 3 , wherein at least one seed layer comprises a continuous CVD seed layer over the sidewalls of the opening. 
     
     
         6 . The device of  claim 5 , wherein the CVD seed layer comprises a continuous ALD seed layer over the sidewalls of the opening. 
     
     
         7 . The device of  claim 5 , further comprising a PVD seed layer disposed between the embedded portion of the electroplated metallic interconnect and the CVD seed layer over the sidewalls of the opening. 
     
     
         8 . The device of  claim 5 , further comprising a PVD seed layer disposed between the CVD seed layer and the one or more barrier layers over the sidewalls of the opening. 
     
     
         9 . The device of  claim 6 , further comprising a PVD seed layer disposed between the embedded portion of the electroplated metallic interconnect and the ALD seed layer over the sidewalls of the opening. 
     
     
         10 . The device of  claim 6 , further comprising a PVD seed layer disposed between the ALD seed layer and the one or more barrier layers over the sidewalls of the opening. 
     
     
         11 . The device of  claim 1 , wherein the opening has a width between 0.10-0.13 μm, or narrower. 
     
     
         12 . The device of  claim 1 , wherein the opening has a width between 0.10-0.13 μm. 
     
     
         13 . The device of  claim 1 , wherein the opening has an aspect ratio in a range from 8:1 to 20:1. 
     
     
         14 . The device of  claim 13 , further comprising at least one seed layer disposed between the embedded portion of the electroplated metallic interconnect and the sidewalls of the opening. 
     
     
         15 . The device of  claim 14 , further comprising one or more barrier layers disposed between the at least one seed layer and the sidewalls of the opening. 
     
     
         16 . The device of  claim 15 , wherein at least one seed layer comprises a continuous PVD seed layer over the sidewalls of the opening. 
     
     
         17 . The device of  claim 15 , wherein at least one seed layer comprises a continuous CVD seed layer over the sidewalls of the opening. 
     
     
         18 . The device of  claim 17 , wherein the CVD seed layer comprises a continuous ALD seed layer over the sidewalls of the opening. 
     
     
         19 . The device of  claim 17 , further comprising a PVD seed layer disposed between the embedded portion of the electroplated metallic interconnect and the CVD seed layer over the sidewalls of the opening. 
     
     
         20 . The device of  claim 17 , further comprising a PVD seed layer disposed between the CVD seed layer and the one or more barrier layers over the sidewalls of the opening. 
     
     
         21 . The device of  claim 18 , further comprising a PVD seed layer disposed between the embedded portion of the electroplated metallic interconnect and the ALD seed layer over the sidewalls of the opening. 
     
     
         22 . The device of  claim 18 , further comprising a PVD seed layer disposed between the ALD seed layer and the one or more barrier layers over the sidewalls of the opening. 
     
     
         23 . The device of  claim 13 , wherein the opening has a width between 0.10-0.13 μm, or narrower. 
     
     
         24 . The device of  claim 13 , wherein the opening has a width between 0.10-0.13 μm. 
     
     
         25 . The device of  claim 1 , wherein the opening has an aspect ratio in a range from 10:1 to 20:1. 
     
     
         26 . The device of  claim 25 , wherein the opening has a width between 0.10-0.13 μm, or narrower. 
     
     
         27 . The device of  claim 25 , wherein the opening has a width between 0.10-0.13 μm. 
     
     
         28 . The device of  claim 25 , further comprising at least one seed layer disposed between the embedded portion of the electroplated metallic interconnect and the sidewalls of the opening. 
     
     
         29 . The device of  claim 28 , further comprising one or more barrier layers disposed between the at least one seed layer and the sidewalls of the opening. 
     
     
         30 . The device of  claim 29 , wherein at least one seed layer comprises a continuous PVD seed layer over the sidewalls of the opening. 
     
     
         31 . The device of  claim 29 , wherein at least one seed layer comprises a continuous CVD seed layer over the sidewalls of the opening. 
     
     
         32 . The device of  claim 31 , wherein the CVD seed layer comprises a continuous ALD seed layer over the sidewalls of the opening. 
     
     
         33 . The device of  claim 31 , further comprising a PVD seed layer disposed between the embedded portion of the electroplated metallic interconnect and the CVD seed layer over the sidewalls of the opening. 
     
     
         34 . The device of  claim 31 , further comprising a PVD seed layer disposed between the CVD seed layer and the one or more barrier layers over the sidewalls of the opening. 
     
     
         35 . The device of  claim 32 , further comprising a PVD seed layer disposed between the embedded portion of the electroplated metallic interconnect and the ALD seed layer over the sidewalls of the opening. 
     
     
         36 . The device of  claim 32 , further comprising a PVD seed layer disposed between the ALD seed layer and the one or more barrier layers over the sidewalls of the opening.