US2014077804A1PendingUtilityA1

Methods for Truncation Error Minimization in an MRI Device

39
Assignee: DEMHARTER NIKOLAUSPriority: Sep 20, 2012Filed: Sep 19, 2013Published: Mar 20, 2014
Est. expirySep 20, 2032(~6.2 yrs left)· nominal 20-yr term from priority
G01R 33/3621G01R 33/36
39
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

Devices and methods for the truncation of signal data in a system of a magnetic resonance imaging (MRI) device are provided. A device includes a demodulator that provides multiple truncation of signal data on a route between an input and an output of a system for the respective reduction of a bit width of signal data. Signal data to be truncated is inverted in each case before or after a truncation in only a part of the multiple truncations.

Claims

exact text as granted — not AI-modified
1 . A method for processing signal data in a system of a magnetic resonance imaging (MRI) device, the method comprising:
 providing multiple truncation of signal data on a route between an input and an output of the system for the respective reduction of a bit width of the signal data in the system; and   providing, with at least one compensation mechanism, at least one compensation of offsets of the signal data induced by truncation.   
     
     
         2 . The method of  claim 1 , wherein system of the MRI device comprises a demodulator. 
     
     
         3 . The method of  claim 1 , wherein the providing of the at least one compensation of offsets comprises inverting signal data to be truncated before or after the truncation in only a part of the multiple truncations. 
     
     
         4 . The method of  claim 3 , further comprising inverting, at several sections of an even number, the signal to be processed before the truncation of the signal to be processed. 
     
     
         5 . The method of  claim 1 , further comprising inverting the signal to be processed before the truncation in half of the cases of multiple truncations. 
     
     
         6 . The method of  claim 1 , wherein one of the multiple truncations of signal data takes place during a processing at different places in the system between the input of the system and the output of the system. 
     
     
         7 . The method of  claim 3 , wherein by truncation in only one part of the cases of the multiple truncations, mutually occurring offsets at several truncations compensate each other in full or partially. 
     
     
         8 . The method of  claim 1 , further comprising inverting a signal to be processed by a computing operation before truncation of the signal to be processed,
 wherein coefficients to be multiplied with the signal data with a multiplier are used in inverted form, negative form, or inverted and negative form.   
     
     
         9 . The method of  claim 1 , wherein an offset at the output of the system is measureable or determinable by calculation or from a structure of a processing chain, a size of coefficients that cause a scaling, or a combination thereof. 
     
     
         10 . The method of  claim 1 , wherein with all or a part of the signal data, during processing at different places in the system, truncation takes place several times between the input of the system and the output of the system. 
     
     
         11 . The method of  claim 1 , wherein the providing of the at least one compensation of offsets comprises compensating for an offset measured by summation or determined by calculation at least once at the output of the system of the MRI device, in which the multiple truncation of the signal data takes place on the route between the input and the output of the system, the compensating comprising adding a constant positive or negative value. 
     
     
         12 . The method of  claim 11 , wherein the compensating comprises adding the constant positive or negative value at the input, the output, or the input and the output. 
     
     
         13 . A device for processing signal data in an imaging magnetic resonance imaging (MRI) device system, the device comprising:
 truncation mechanisms between an input and an output of the device, the truncation mechanisms operable to limit a bit width of the signal data by truncation; and   at least one offset compensation mechanism operable to compensate offsets induced by truncation of the signal data.   
     
     
         14 . The device of  claim 13 , further comprising inversion mechanisms operable to invert the signal data,
 wherein each of the inversion mechanisms is positioned upstream or downstream of only a part of the truncation mechanisms as an offset compensation mechanism.   
     
     
         15 . The device of  claims 13 , wherein a plurality of places are provided in order in each case to invert a signal to be processed before or after truncation. 
     
     
         16 . The device of  claim 15 , wherein the plurality of places are provided in order in each case to invert the signal to be processed on each second truncation of the signal to be processed on a route between the input and output. 
     
     
         17 . The device of  claim 13 , wherein in half of the cases of the multiple truncations of a signal, truncation of a signal to be processed is provided between the input and output. 
     
     
         18 . The device of  claim 13 , wherein the truncation mechanisms are provided at more than two places in the system between the input of the system and the output of the system. 
     
     
         19 . The device of  claim 13 , wherein the device is configured such that, by truncation in only one part of the cases of the multiple truncations, mutually occurring offsets at a plurality of truncations compensate each other in full or partially. 
     
     
         20 . The device of  claim 14 , wherein a signal to be processed by a computing operation is in each case inverted before or after the truncation, and
 wherein coefficients to be multiplied with the signal data with a multiplier are used in inverted form, negative form, or inverted and negative form of the coefficients.   
     
     
         21 . The device of  claim 13 , wherein the device is configured such that an offset at the output of the system is measurable or determinable by calculation from a structure of a processing chain, size coefficients that cause scaling, or a combination thereof. 
     
     
         22 . The device of  claim 13 , wherein during processing, the truncation mechanisms are operable to provide truncation a plurality of times on the signal data at different places in the device between the input of the device and the output of the device. 
     
     
         23 . The device of  claim 13 , further comprising an addition mechanism as an offset compensation mechanism,
 wherein the addition mechanism is configured to compensate an offset measured by summation or determined by calculation at an output of a system of the MRI device, in which multiple truncation of the signal data takes place on a route between an input of the system and the output of the system, by addition of a stored constant positive or negative value.   
     
     
         24 . The device of  claim 23 , wherein the addition mechanism is configured to add the stored constant positive or negative value at the input of the system or the output of the system.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.