Scheduling and Traffic Management with Offload Processors

Abstract

A method for providing scheduling services for network packet processing using a memory bus connected module is disclosed. The method can include transferring network packets to the module through a memory bus connection, reordering network packets received from the memory bus connection with a scheduling circuit and placing the reordered network packets into multiple input/output queues, and modifying reordered network packets placed into multiple input/output queues using multiple offload processors connected to the memory bus.

What is claimed is: 
     
         1 . A method for providing scheduling services for network packet processing using a memory bus connected module, comprising the steps of:
 transferring network packets to the module through a memory bus connection,   reordering network packets received from the memory bus connection with a scheduling circuit and placing the reordered network packets into multiple input/output queues, and   modifying reordered network packets placed into multiple input/output queues using multiple offload processors connected to the memory bus.   
     
     
         2 . The method of  claim 1 , wherein placing the reordered network packets is based on availability of the multiple offload processors. 
     
     
         3 . The method of  claim 1 , wherein the reordering of network packets is according to session priorities of the network packets. 
     
     
         4 . The method of  claim 1 , further including initiating a context switch of at least one of the multiple offload processors by operation of the scheduling circuit. 
     
     
         5 . The method of  claim 1 , further including transferring network packets into a defined traffic management queue by operation of the scheduling circuit. 
     
     
         6 . The method of  claim 1 , further including determining when packet processing for each of the multiple offload processors is complete by operation of the scheduling circuit. 
     
     
         7 . The method of  claim 1  further including preempting a current network packet processing session by operation of the scheduling circuit. 
     
     
         8 . The method of  claim 1 , wherein transferring network packets to the module includes transferring the network packets through a memory bus socket. 
     
     
         9 . The method of  claim 1 , wherein transferring network packets to the module includes transferring the network packets through a dual in line memory module (DIMM) or DIMM compatible socket.