Method of Manufacturing Multilayer Wiring Substrate, and Multilayer Wiring Substrate

Abstract

In a build-up step, a plurality of resin insulation layers and a plurality of conductive layers are alternately laminated in multilayer arrangement on a metal foil separably laminated on a side of a base material, thereby forming a wiring laminate portion. In a drilling step, a plurality of openings are formed in an outermost resin insulation layer through laser drilling so as to expose connection terminals. Subsequently, in a desmear step, smears from inside the openings are removed. In a base-material removing step performed after the build-up step, the base material is removed and the metal foil is exposed.

What is claimed is: 
     
         1 . A multilayer wiring substrate having a laminate structure in which a plurality of resin insulation layers made primarily of the same resin insulation material, and a plurality of conductive layers are laminated alternately in multilayer arrangement, a plurality of first-main-surface-side connection terminals being disposed on one side of the laminate structure where a first main surface thereof is present, a plurality of second-main-surface-side connection terminals being disposed on an other side of the laminate structure where a second main surface thereof is present, the plurality of conductive layers being formed in the plurality of resin insulation layers and interconnected by means of via conductors whose diameters increase toward the first main surface or the second main surface,
 wherein:   the plurality of resin insulation layers are formed of a build-up material mainly formed of a hardened resin insulation material that is not photocurable;   a plurality of openings are formed in an outermost resin insulation layer of the laminate structure exposed as the first main surface;   at least two types of connection terminals, including IC-chip connection terminals to which an IC chip is to be connected, and passive-component connection terminals to which a passive component connection is to be connected and which have a larger exposed surface area than the IC-chip connection terminals, are present on the first main surface as the first-main-surface-side connection terminals; and   the IC-chip connection terminals are disposed in the plurality of openings, top surfaces of the IC-chip connection terminals are lower in height than an outer surface of the outermost resin insulation layer, and peripheral portions of the IC-chip connection terminals are buried in the outermost resin insulation layer.   
     
     
         2 . The multilayer wiring substrate according to  claim 1 , wherein each of the passive-component connection terminals has a structure in which a plating layer of a material other than copper covers a top surface and a side surface of a portion of a copper layer which portion is a main constituent thereof, and each of the IC-chip connection terminals has a structure in which a plating layer of a material other than copper covers only a top surface of a portion of the copper layer which portion is a main constituent thereof. 
     
     
         3 . The multilayer wiring substrate according to  claim 2 , wherein the plating layer of a material comprises nickel and gold other than copper is a nickel-gold plating layer or a nickel-palladium-gold plating layer. 
     
     
         4 . The multilayer wiring substrate according to  claim 1 , wherein the plurality of resin insulation layers are formed of a build-up material made primarily of a hardened thermosetting epoxy resin, phenol resin, urethane resin, silicone resin, or polyimide resin. 
     
     
         5 . The multilayer wiring substrate according to  claim 1 , wherein:
 each of the passive-component connection terminals has a structure in which a plating layer of a material comprises nickel and gold other than copper covers a top surface and a side surface of a portion of a copper layer which portion is a main constituent thereof;   
       and
 each of the IC-chip connection terminals has a structure in which a plating layer of a material comprises nickel and gold other than copper covers only a top surface of a portion of the copper layer which portion is a main constituent thereof.