Semiconductor integrated circuit device

Abstract

An electrode pad is provided above a circuit block of a semiconductor integrated circuit device. A junction point A and a junction point B are provided on connection lines connecting electrode pads to an internal circuit and an electrostatic discharge (ESD) protection circuit. The junction point A and the junction point B are positioned at locations closer to the ESD protection circuit than to the electrode pads.

1 - 9 . (canceled) 
     
     
         10 . A semiconductor integrated circuit device, comprising:
 a circuit block having an electrostatic discharge (ESD) protection circuit and an internal circuit which is an input circuit, an output circuit, or an input/output circuit;   an electrode pad provided above the circuit block, and electrically connected to the internal circuit; and   a peripheral portion located outside of the circuit block; and   a connection line connecting the electrode pad to the internal circuit and the ESD protection circuit and having a junction point thereon, wherein:   the connection line includes a first line connecting the electrode pad and the junction point, a second line connecting the junction point and the internal circuit, and a third line connecting the junction point and the ESD protection circuit,   the junction point is located between the ESD protection circuit and the internal circuit in a first direction in a plane view,   the junction point is positioned at a location which is closer to the ESD protection circuit than to the internal circuit in the first direction in the plane view,   the circuit block includes an internal circuit area in which the internal circuit is provided, and   the ESD protection circuit is provided outside of the internal circuit area and is separated from the internal circuit.   
     
     
         11 . The semiconductor integrated circuit device of  claim 10 , wherein
 a resistance value of the third line is smaller than a resistance value of the second line.   
     
     
         12 . The semiconductor integrated circuit device of  claim 10 , wherein
 the second line is longer than the third line.   
     
     
         13 . The semiconductor integrated circuit device of  claim 10 , wherein
 the ESD protection circuit is positioned at a location which is closer to an edge of the circuit block than the internal circuit area.   
     
     
         14 . The semiconductor integrated circuit device of  claim 10 , wherein
 the electrode pad connected to the ESD protection circuit is adjacent to the ESD protection circuit, or at a location which overlaps with the ESD protection circuit.