Device
Abstract
Provided is a device, including: a first terminal which receives an external clock signal; a clock generation circuit connected to the first terminal to generate an internal clock signal based on the external clock signal; word lines and bit lines; amplifier circuits connected to the bit lines, respectively; and a control unit. The control unit controls, in a test operation, at least one of the word lines to repeat a selected state and an unselected state in accordance with the internal clock signal during a first period, and maintains the amplifier circuits in an active state during the first period. The control unit further controls, in a normal operation, the amplifier circuits to switch between the active state and an inactive state depending on switching between the selected state and the unselected state of the at least one of the word lines.
Claims
exact text as granted — not AI-modified1 . (canceled)
2 . A method, comprising:
receiving an external clock signal; generating an internal clock signal based on the external clock signal; controlling, in a test operation, at least one word line of a plurality of word lines to repeat a selected state and an unselected state in accordance with the internal clock signal during a first period; maintaining a plurality of amplifier circuits in an active state during the first period; controlling, in a normal operation, the plurality of amplifier circuits to switch between the active state and an inactive state depending on switching between the selected state and the unselected state of the at least one word line of the plurality of word lines; and performing a selection control of the plurality of word lines and an activation control of the plurality of amplifier circuits based on control signals supplied from outside.
3 . The method according to claim 2 , wherein the plurality of amplifier circuits are controlled to the active state in response to an activation command supplied from the outside, and the plurality of amplifier circuits are controlled to the inactive state in response to a precharge command supplied from the outside.
4 . The method according to claim 3 , wherein, when a test mode set code is supplied during a period from when the activation command is supplied to when the precharge command is supplied, the at least one word line of the plurality of word lines is controlled to repeat the selected state and the unselected state in accordance with the internal clock signal until a test mode reset code is supplied.
5 . The method according to claim 4 , further comprising providing a test mode signal, which is set to an active level in response to the test mode set code and is set to an inactive level in response to the test mode reset code.
6 . The method according to claim 5 , further comprising passing or blocking the test mode signal in accordance with the internal clock signal.
7 . The method according to claim 5 , further comprising:
providing a row operation control signal, which is set to an active level in response to the activation command and is set to an inactive level in response to the precharge command; and providing, when the row operation control signal is at the active level and the test mode signal is at the active level, a signal obtained by logically inverting the internal clock signal as a word line control signal.
8 . The method according to claim 2 , further comprising providing a word line control signal for setting the at least one word line of the plurality of word lines to one of the selected state and the unselected state.Join the waitlist — get patent alerts
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