US2014232017A1PendingUtilityA1

Identification mechanism for semiconductor device die

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Assignee: RAMPLEY COLBY GPriority: Aug 30, 2012Filed: Apr 28, 2014Published: Aug 21, 2014
Est. expiryAug 30, 2032(~6.1 yrs left)· nominal 20-yr term from priority
H10W 72/9445H10W 72/01951H10W 72/01938H10W 72/952H10W 72/932H10W 72/075H10W 72/50H10W 70/655H10W 46/607H10W 46/603H10W 46/401H10W 46/101H10W 46/00H10W 72/00H01L 23/48
48
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Claims

Abstract

A method and system for uniquely identifying each semiconductor device die from a wafer is provided. Identifying features are associated with device die bond pads. In one embodiment, one or more tab features are patterned and associated with each of one or more device die bond pads. These features can represent a code (e.g., binary or ternary) that uniquely identifies each device die on the wafer. Each tab feature can be the same shape or different shapes, depending upon the nature of coding desired. Alternatively, portions of the one or more device die bond pads can be omitted as a mechanism for providing coded information, rather than adding portions to the device die bond pads.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 - 12 . (canceled) 
     
     
         13 . A die located on a semiconductor wafer, the die comprising:
 a first bond pad located in a bond pad region; and   one or more bond pad features coupled to the first bond pad, wherein an aspect of the one or more bond pad features provides information associated with the die.   
     
     
         14 . The die of  claim 13  further comprising:
 a first set of one or more bond pads in the bond pad region, wherein
 the first set of bond pads comprises the first bond pad, 
 the first set of bond pads is configured to provide the information associated with the die, and 
 one or more of the first set of bond pads each comprises one or more bond pad features. 
 
 
     
     
         15 . The die of  claim 14  wherein the information associated with the die uniquely identifies the die on the semiconductor wafer. 
     
     
         16 . The die of  claim 14  wherein the information associated with the die uniquely identifies a location of the die on the semiconductor wafer. 
     
     
         17 . The die of  claim 16  wherein the information associated with the die comprises:
 an X-coordinate associated with a grid square, corresponding to the die, on a wafer map associated with the semiconductor wafer; and 
 a Y-coordinate associated with the grid square. 
 
     
     
         18 . The die of  claim 17  further comprising:
 a first set of the one or more bond pad features corresponding to each digit of a binary representation of the X-coordinate; and 
 a second set of the one or more bond pad features corresponding to each digit of a binary representation of the Y-coordinate. 
 
     
     
         19 . The die of  claim 13  wherein the aspect of the one or more bond pad features comprises one or more of a number of the bond pad features associated with the first bond pad, a shape of each bond pad feature, and indentations formed in the first bond pad. 
     
     
         20 . A semiconductor wafer comprising:
 a plurality of integrated circuit dies formed on the semiconductor wafer, wherein each integrated circuit die comprises
 one or more bond pads located on the integrated circuit die, 
 a first set of the one or more bond pads configured to provide unique information associated with the integrated circuit die by virtue of comprising one or more bond pad features associated with one or more bond pads of the first set of bond pads. 
   
     
     
         21 . The semiconductor wafer of  claim 20  wherein the information associated with the integrated circuit die uniquely identifies the integrated circuit die on the semiconductor wafer. 
     
     
         22 . The semiconductor wafer of  claim 20  wherein the information associated with the die uniquely identifies a location of the integrated circuit die on the semiconductor wafer. 
     
     
         23 . The semiconductor wafer of  claim 22  wherein the information associated with the integrated circuit die comprises:
 an X-coordinate associated with a grid square, corresponding to the die, on a wafer map associated with the semiconductor wafer; and 
 a Y-coordinate associated with the grid square. 
 
     
     
         24 . The semiconductor wafer of  claim 23  further comprising:
 a first set of the one or more bond pad features corresponding to each digit of a binary representation of the X-coordinate; and 
 a second set of the one or more bond pad features corresponding to each digit of a binary representation of the Y-coordinate. 
 
     
     
         25 . The semiconductor wafer of  claim 20  wherein the aspect of the one or more bond pad features comprises one or more of a number of the bond pad features associated with the first bond pad, a shape of each bond pad feature, and indentations formed in the first bond pad.

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