US2014281169A1PendingUtilityA1
Flash-based storage system including reconfigurable circuitry
Est. expiryMar 15, 2033(~6.7 yrs left)· nominal 20-yr term from priority
G06F 12/0866G06F 12/0246
51
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
Apparatus and method for accelerating processing operations of flash based storage systems are disclosed herein. In some embodiments, an IC component disposed between I/O circuitry and flash storage devices is configured to optimize fulfillment of data read and write requests originating from a network or device external to the flash based storage system using cache memory before involving the flash storage devices.
Claims
exact text as granted — not AI-modified1 . (canceled)
2 . A system comprising:
input/output (I/O) circuitry; at least one processor; an array of flash storage devices; at least one cache memory; and at least one integrated circuit (IC) component coupled to each of the processor and the cache memory and disposed between the I/O circuitry and the array of flash storage devices, the IC component handling data requests from an external source between the I/O circuitry and the array of flash storage devices, wherein the IC component includes a first circuitry portion to prioritize storage and access of data associated with the data requests in the cache memory over the array of flash storage devices and a second circuitry portion to perform a processing function offloaded by the processor, at least the second circuitry portion comprising reconfigurable circuitry.
3 . The system of claim 2 , wherein the IC component comprises a field programmable gate array (FPGA).
4 . The system of claim 2 , wherein the processing function offloaded by the processor comprises software implemented functionality in the processor relating to fulfilling the data requests.
5 . The system of claim 2 , wherein the processing function is performed faster by the second circuitry portion than by the processor.
6 . The system of claim 2 , wherein the processing function offloaded by the processor comprises a functionality requested by the external source not related to fulfilling the data requests.
7 . The system of claim 2 , wherein the processing function comprises data compression, data decompression, de-duplication, snapshots, thin provisioning, encryption, decryption, an application, an algorithm, or a function relating to data access or storage within the system.
8 . The system of claim 2 , wherein the processor sends reconfiguration data and instructions to the IC component when a request to perform the processing function arises and the second circuitry portion is not configured to perform the processing function, and wherein the second circuitry portion is reconfigured in accordance with the reconfiguration data and instructions.
9 . The system of claim 2 , wherein the processor sends input data to perform the processing function to the second circuitry portion, the second circuitry portion performs the processing function using the input data, and the IC component returns output data upon completion of the processing function to the processor.
10 . The system of claim 2 , wherein the IC component includes a third circuitry portion to detect occurrence of a compound event in the system.
11 . An integrated circuit (IC) component included in a flash based storage system, comprising:
a first circuitry to prioritize storage and access of data in a cache memory over an array of flash storage devices, the data associated with data requested made from an external source to the flash based storage system, and the flash based storage system including the cache memory, the array of flash storage devices, and a processor; and a second circuitry coupled to the first circuitry, the second circuitry comprising reconfigurable circuitry, the second circuitry to perform a processing function offloaded from the processor.
12 . The IC component of claim 11 , wherein the IC component comprises a field programmable gate array (FPGA).
13 . The IC component of claim 11 , wherein the processing function offloaded by the processor comprises software implemented functionality in the processor relating to fulfilling the data requests.
14 . The IC component of claim 11 , wherein the processing function offloaded by the processor comprises a functionality requested by the external source not related to fulfilling the data requests.
15 . The IC component of claim 11 , wherein the processing function comprises data compression, data decompression, de-duplication, snapshots, thin provisioning, encryption, decryption, an application, an algorithm, or a function relating to data access or storage within the system.
16 . The IC component of claim 11 , wherein the processor sends input data to perform the processing function to the second circuitry, the second circuitry performs the processing function using the input data, and the second circuitry returns output data upon completion of the processing function to the processor.
17 . The IC component of claim 11 , further comprising a third circuitry to detect occurrence of a compound event in the system.
18 . A method comprising:
receiving, by a reconfigurable circuitry disposed between I/O circuitry and an array of flash storage devices of a flash based storage system, input data to perform a processing function offloaded from a processor; performing, by the reconfigurable circuitry, the processing function using the input data; sending, by the reconfigurable circuitry, output data upon completion of the performing of the processing function; and prioritizing, by the reconfigurable circuitry, storage and access of data associated with data requests to the flash based storage system from an external source in the cache memory instead of the array of flash storage devices.
19 . The method of claim 18 , further comprising receiving, by the reconfigurable circuitry, reconfiguration instructions and data when a request to perform the processing function arises and the reconfigurable circuitry is not configured to perform the processing function; and reconfiguring the reconfigurable circuitry according to the reconfiguration instructions and data prior to the performing of the processing function.
20 . The method of claim 18 , wherein the processing function offloaded by the processor comprises software implemented functionality in the processor relating to fulfilling the data requests.
21 . The method of claim 18 , wherein the processing function offloaded by the processor comprises a functionality requested by the external source not related to fulfilling the data requests.Cited by (0)
No later patents cite this yet.
References (0)
No backward citations on record.