Method of manufacturing semiconductor device having plural semiconductor chips stacked one another

Abstract

Disclosed herein is a method of manufacturing a semiconductor device that includes stacking a plurality of semiconductor chips to form a first chip laminated body, providing an underfill material to fill gaps between the semiconductor chips so that a fillet portion is formed around the first chip laminated body, and trimming the fillet portion to form a second chip laminated body.

What is claimed is: 
     
         1 . A method of manufacturing a semiconductor device comprising:
 stacking a plurality of semiconductor chips to form a first chip laminated body;   providing an underfill material to fill gaps between the semiconductor chips so that a fillet portion is formed around the first chip laminated body;   trimming the fillet portion to form a second chip laminated body with a first bump electrode and second bump electrodes;   preparing a logic semiconductor chip having one surface that is a substantially flat plane and another, opposite surface on which third and fourth bump electrodes are provided;   mounting the logic semiconductor chip on a wiring substrate having a connection pad on a principal surface thereof such that the one surface of the logic semiconductor chip faces the principal surface of the wiring substrate;   flip-chip mounting the second chip laminated body on the other surface of the logic semiconductor chip such that the third bump electrode is electrically connected to the second chip laminated body; and   connecting the fourth bump electrode to the connection pad by wire bonding.   
     
     
         2 . The method of manufacturing the semiconductor device as claimed in  claim 1 , further comprising forming a first sealing resin to seal a space between the second chip laminated body and the logic semiconductor chip. 
     
     
         3 . The method of manufacturing the semiconductor device as claimed in  claim 2 , further comprising forming a second sealing resin to seal the second chip laminated body, the first sealing resin, and the logic semiconductor chip on the principal surface of the wiring substrate. 
     
     
         4 . The method of manufacturing the semiconductor device as claimed in  claim 1 , further comprising forming an external connection pad that is electrically connected to the connection pad on a back surface of the wiring substrate. 
     
     
         5 . The method of manufacturing the semiconductor device as claimed in  claim 1 , wherein the trimming is performed such that the second chip laminated body has a trimmed surface that is substantially parallel to a side surface of each of the semiconductor chips. 
     
     
         6 . The method of manufacturing the semiconductor device as claimed in  claim 1 , wherein,
 each of the semiconductor chips has a rectangle shape, thereby the fillet portion is formed on each of four side walls of the first chip laminated body, and   the trimming is performed such that each of the fillet portions formed on the four side walls are trimmed.   
     
     
         7 . The method of manufacturing the semiconductor device as claimed in  claim 1 , wherein the trimming is performed by cutting or polishing. 
     
     
         8 . The method of manufacturing the semiconductor device as claimed in  claim 1 , further comprising flip-chip mounting the second chip laminated body on a wiring substrate. 
     
     
         9 . The method of manufacturing the semiconductor device as claimed in  claim 1 , wherein the providing the underfill material includes:
 placing the first chip laminated body such that the one surface of the first chip body faces a sheet material attached to a flat plane of a stage;   dispensing the underfill material in a liquid state to a side wall of the first chip laminated body to seal gaps between the semiconductor chips with a help of capillary phenomenon; and   curing the underfill material to change from the liquid state to a solid state.   
     
     
         10 . The method of manufacturing the semiconductor device as claimed in  claim 1 , wherein one of the second semiconductor chips that is lastly stacked in the stacking is an interface chip, and the other second semiconductor chips and the first semiconductor chip are memory chips. 
     
     
         11 . The method of manufacturing the semiconductor device as claimed in  claim 1 , wherein,
 the plurality of the semiconductor chips include a first semiconductor chip and a plurality of second semiconductor chips,   the first semiconductor chip includes a first chip body having one surface that is a substantially flat plane and another, opposite surface on which the first bump electrode is provided,   each of the second semiconductor chips includes a second chip body, the penetration electrode that penetrates through the second chip body, and the second bump electrodes provided at both ends of the penetration electrode, and   the stacking is performed by mounting the first semiconductor chip onto a stage of a bonding tool such that the one surface of the first chip body faces the stage, and thereafter sequentially mounting the second semiconductor chips on the first semiconductor chip such that the first bump electrodes, the second bump electrodes and the penetration electrodes are electrically connected to one another;