Complementary metal oxide semiconductor power amplifier
Abstract
An RF power amplifier circuit is disclosed. A driver amplifier stage includes a first set of a plurality of amplifier transistors in a cascode configuration, a driver amplifier stage input, and a driver amplifier stage output. A final amplifier stage includes a second set of a plurality of amplifier transistors in a cascode configuration, a final amplifier stage input connected to the driver amplifier stage output, a final amplifier stage output, and a power supply input. An envelope signal amplifier has an input connectible to an envelope signal source, and an output capacitively coupled to the power supply input. A power converter input is connected to the power supply input to provide supplemental power to the final amplifier stage based on an envelope signal from the envelope signal source that corresponds to an input RF signal.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A radio frequency (RF) power amplifier circuit, comprising:
a driver amplifier stage including a first set of a plurality of amplifier transistors in a cascode configuration, a driver amplifier stage input, and a driver amplifier stage output; a final amplifier stage including a second set of a plurality of amplifier transistors in a cascode configuration, a final amplifier stage input connected to the driver amplifier stage output, a final amplifier stage output, and a power supply input; an envelope signal amplifier having an input connectible to an envelope signal source, and an output capacitively coupled to the power amplifier power supply input; and a power converter input connected to the power amplifier power supply input to provide main power to the final amplifier stage based on an envelope signal from the envelope signal source corresponding to an input RF signal.
2 . The RF power amplifier circuit of claim 1 , further comprising:
a power converter with an output connected to the power converter input and generating a direct current voltage level corresponding to a first voltage component designated by a transceiver and applied to a reference node of the power converter and a second voltage component derived from a current sense value from the envelope signal amplifier and applied to the reference node.
3 . The RF power amplifier circuit of claim 2 , wherein the first voltage component is designated at each transmission slot change.
4 . The RF power amplifier circuit of claim 2 , wherein the power converter is a DC-DC converter connected to a battery power source.
5 . The RF power amplifier circuit of claim 1 , further comprising:
an input matching circuit connected to an RF signal input and the driver amplifier stage input.
6 . The RF power amplifier circuit of claim 1 , further comprising:
an output matching circuit connected to an RF signal output and the final amplifier stage output.
7 . The RF power amplifier circuit of claim 1 , further comprising:
an inter-stage matching circuit connected to the driver amplifier stage output and the final amplifier stage input.
8 . The RF power amplifier circuit of claim 1 , further comprising:
an RF signal rejection inductor-capacitor network connected to the power converter input and the power supply input of the final amplifier stage.
9 . The RF power amplifier circuit of claim 1 , wherein the driver amplifier stage includes a driver amplifier power supply input.
10 . The RF power amplifier circuit of claim 9 , wherein a constant voltage source is connected to the driver amplifier power supply input.
11 . The RF power amplifier circuit of claim 1 , further comprising:
an external capacitor connected to the power converter input and the output of the envelope signal amplifier.
12 . The RF power amplifier circuit of claim 1 , wherein transistors of the driver amplifier stage, the final amplifier stage, and the envelope signal amplifier are complementary metal oxide semiconductor (CMOS) transistors.
13 . An RF front end circuit, comprising:
a high band antenna port; a high band signal input port; a low band antenna port; a low band signal input port; a unified power amplifier module including a high band power amplifier and a low band power amplifier, the high band signal input port being connected to the high band power amplifier, and the low band signal input port being connected to the low band power amplifier; a band switch with a first pole terminal connected to the high band power amplifier, a second pole terminal connected to the low band power amplifier, a first set of throw terminals individually connectible to the first pole terminal, and a second set of throw terminals individually connectible to the second pole terminal; and an antenna switch with a first pole terminal connected to the high band antenna port, a second pole terminal connected to the low band antenna, a first set of throw terminals individually connectible to the first pole terminal, and a second set of throw terminals individually connectible to the second pole terminal; wherein at least one of the first set of throw terminals of the band switch is connectible to at least one of the first set of throw terminals of the antenna switch over an external first signal transmission component, at least one of the second set of throw terminals of the band switch is connectible to at least one of the second set of throw terminals of the antenna switch over an external second signal transmission component.
14 . The RF front end circuit of claim 13 , further comprising:
an envelope signal amplifier with an output connected to the unified power amplifier module.
15 . The RF front end circuit of claim 13 , wherein the external first signal transmission component is a duplexer with a first port connected to the one of the first set of throw terminals of the band switch, a second port connectible to a receive line, and a third port connected to the one of the first set of throw terminals of the antenna switch.
16 . The RF front end circuit of claim 13 , wherein the external second signal transmission component is a duplexer with a first port connected to the one of the second set of throw terminals of the band switch, a second port connectible to a receive line, and a third port connected to the one of the second set of throw terminals of the antenna switch.
17 . The RF front end circuit of claim 13 , wherein the high band power amplifier and the low band power amplifier each include a first amplifier circuit for a first operating mode and a second amplifier circuit for a second operating mode.
18 . The RF front end circuit of claim 17 , wherein the high band power amplifier and the low band power amplifier further each include a third amplifier circuit for a third operating mode.
19 . The RF front end circuit of claim 18 , wherein an output of the third amplifier circuit is connected to another one of the first set of throw terminals of the antenna switch.
20 . The RF front end circuit of claim 13 , wherein the unified power amplifier module, the band switch, and the antenna switch are controlled through a standardized serial peripheral interface.
21 . The RF front end circuit of claim 15 , wherein the standardized serial peripheral interface is MIPI-compliant.
22 . The RF front end circuit of claim 13 , wherein the band switch and the antenna switch are fabricated on a silicon-on-insulator (SOI) substrate.
23 . The RF front end circuit of claim 13 , wherein:
the band switch is a dual pole, decuple throw switch; and the antenna switch is a dual pole, decuple throw switch.
24 . The RF front end circuit of claim 13 , wherein the unified power amplifier module, the band switch, and the antenna switch are fabricated on a single semiconductor die.Join the waitlist — get patent alerts
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