Multi-protocol i/o interconnect flow control

Abstract

Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A switch includes a receive to receive a first message and a second message. The switch further includes first protocol logic to process the first message according to a first protocol and an adapter to process the second message according to a second protocol. The first protocol is different from the second protocol.

1 . A switch, comprising:
 a receiver to receive a first message and a second message;   first protocol logic to process the first message according to a first protocol; and   an adapter to process the second message according to a second protocol, wherein the first protocol is different from the second protocol.   
     
     
         2 . The switch of  claim 1 , wherein the receiver includes an adapter port. 
     
     
         3 . The switch of  claim 1  further comprising at least one output port to implement a physical layer. 
     
     
         4 . The switch of  claim 3 , wherein the at least one output port include a null port. 
     
     
         5 . The switch of  claim 1 , wherein the first protocol logic is configured to accommodate PCI Express, USB, DisplayPort, or HDMI. 
     
     
         6 . The switch of  claim 1  further comprising a time management unit. 
     
     
         7 . The switch of  claim 1  further comprising a control port. 
     
     
         8 . The switch of  claim 1  is incorporated into at least one of a laptop computing device, handheld computing device, tablet, netbook, mobile phone, smartphone, personal digital assistant, server, workstation, set-top box, digital recorder, game console, digital media player, or digital camera. 
     
     
         9 . A system, comprising:
 a computer apparatus which includes:
 at least one processor; 
 an input/output (I/O) complex operatively coupled to the at least one processor, the I/O complex includes:
 a plurality of protocol-specific controllers which are to be coupled to an I/O complex; and 
 an I/O interconnect which includes a multi-protocol switching fabric configured to carry multiple I/O protocol data packets; 
 
 wherein the multi-protocol switching fabric includes at least one switch which has a first adapter port to implement a first protocol layer and a second adapter port to implement a second protocol layer; and 
 a peripheral device coupled to the computer apparatus by non-protocol-specific connector port. 
   
     
     
         10 . The system of  claim 9 , wherein the at least one processor includes a plurality of processors. 
     
     
         11 . The system of  claim 9  further comprising system memory operatively coupled to the at least one processor. 
     
     
         12 . The system of  claim 9  further comprising a non-protocol-specific connector port. 
     
     
         13 . The system of  claim 9 , wherein the plurality of protocol-specific controllers are configured to accommodate PCI Express, USB, DisplayPort, and HDMI. 
     
     
         14 . The system of  claim 9 , wherein the peripheral device is at least one of a laptop computing device, handheld computing device, tablet, netbook, mobile phone, smartphone, personal digital assistant, server, workstation, set-top box, digital recorder, game console, digital media player, or digital camera. 
     
     
         15 . The system of  claim 9 , wherein the peripheral device includes:
 an input/output (I/O) complex operatively coupled to the at least one processor, the I/O complex comprises:   a plurality of protocol-specific controllers which are to be coupled to an I/O complex; and   an I/O interconnect which includes a multi-protocol switching fabric configured to carry multiple I/O protocol data packets.   
     
     
         16 . The system of  claim 9 , wherein the at least one switch includes a time management unit. 
     
     
         17 . The system of  claim 9 , wherein the at least one switch includes a control port. 
     
     
         18 . The system of  claim 9  further comprising a non-transitory medium operatively coupled with the at least one processor, and having stored therein a plurality of programming instructions configured to enable the system, in response to execution of the programming instructions, to:
 providing, by a first port of a first switch, a first and second credit grant packets to a second port of a second switch wherein the first and second switches are part of the multi-protocol switching fabric through which a computer can communicate with a plurality of peripheral devices, and wherein the first and second credit grant packets contain an indication of an amount of buffer space available on the first switch for data to be sent from the second switch to the first switch; and 
 receiving, by the first port of the first switch, a first data packet of a first protocol and a second data packet of a second protocol from the second switch through a link between the first port and the second port based at least in part on receipt by the second port of the first and second credit grant packets, wherein a protocol allows a computer to communicate with a peripheral device and wherein the first protocol is different from the second protocol. 
 
     
     
         19 . The system of  claim 9 , wherein the adapter port implements a transport interconnect layer. 
     
     
         20 . The system of  claim 9  further comprising a HDMI source coupled to the at least one switch.