Semiconductor device and method for manufacturing the same

Abstract

In the semiconductor device, a line-type buried gate is formed by burying a non-operating gate (isolation gate) with a polysilicon material to reduce a work function and a Gate Induced Drain Leakage (GIDL) caused by the non-operating gate, resulting in improvement of refresh characteristics of the semiconductor device. Operating gates including a metal conductive material may be formed in a separate step.

1 . A method for manufacturing a semiconductor device comprising:
 forming a non-operating gate in a semiconductor substrate;   forming a first hard mask layer over the semiconductor substrate and the non-operating gate;   forming a trench by etching the first hard mask layer;   burying an insulation film in the trench;   etching a center portion of the insulation film;   burying a second hard mask layer in spaces formed by etching the center portion of the insulation film;   removing the remaining insulation film;   forming an operating gate region by etching the semiconductor substrate using the second and first hard mask layers as an etch mask; and   forming an operating gate in the operating gate region.   
     
     
         2 . The method according to  claim 1 , wherein forming the non-operating gate includes:
 sequentially forming a hard mask oxide film and a hard mask carbon film over the semiconductor substrate;   forming a non-operating gate region by etching the hard mask carbon film and the hard mask oxide film;   forming a gate oxide film in the non-operating gate region;   forming a gate polysilicon layer over the gate oxide film;   etching back the gate polysilicon layer; and   forming a nitride film over the etched-back gate polysilicon layer.   
     
     
         3 . The method according to  claim 2 , wherein forming the non-operating gate region includes:
 anisotropically etching the hard mask carbon film and the hard mask oxide film.   
     
     
         4 . The method according to  claim 1 , wherein forming the first hard mask layer includes:
 forming a hard mask oxide film over the semiconductor substrate including the non-operating gate; and   forming a hard mask polysilicon film over the hard mask oxide film.   
     
     
         5 . The method according to  claim 1 , wherein forming the trench includes:
 anisotropically etching a portion of the first hard mask layer disposed between the non-operating gates.   
     
     
         6 . The method according to  claim 1 , wherein the insulation film includes an oxide film. 
     
     
         7 . The method according to  claim 1 , wherein the second hard mask layer includes a polysilicon film. 
     
     
         8 . The method according to  claim 1 , wherein forming the operating gate region includes anisotropically etching the semiconductor substrate. 
     
     
         9 . The method according to  claim 1 , wherein forming the operating gate in the operating gate region includes:
 forming a gate oxide film in the operating gate region;   forming a gate electrode layer over the gate oxide film;   etching back the gate electrode layer; and   forming a nitride film over the etched-back gate electrode layer.   
     
     
         10 . The method according to  claim 1 , wherein the non-operating gate and the operating gate are formed as line type structures. 
     
     
         11 . The method according to  claim 1 , further comprising:
 after forming the operating gate, forming a source/drain region by implanting N-type impurity ions in the semiconductor substrate.   
     
     
         12 .- 15 . (canceled)