Multi-tiered semiconductor apparatuses including residual silicide in semiconductor tier

Abstract

Methods of forming multi-tiered semiconductor devices are described, along with apparatuses that include them. In one such method, a silicide is formed in a tier of silicon, the silicide is removed, and a device is formed at least partially in a void that was occupied by the silicide. One such apparatus includes a tier of silicon with a void between tiers of dielectric material. Residual silicide is on the tier of silicon and/or on the tiers of dielectric material and a device is formed at least partially in the void. Additional embodiments are also described.

What is claimed is: 
     
         1 . A method comprising:
 forming a silicide in a tier of semiconductor material;   at least substantially removing the silicide from the tier of semiconductor material; and   forming a device at least partially in a void that was occupied by the silicide.   
     
     
         2 . The method of  claim 1 , wherein forming a silicide comprises forming a silicide in a tier of polysilicon. 
     
     
         3 . The method of  claim 1 , wherein forming a silicide comprises:
 forming metal on the tier of semiconductor material; and   annealing the metal and the tier of semiconductor material.   
     
     
         4 . The method of  claim 3 , wherein the metal is selected from the group consisting of cobalt, titanium, tungsten, nickel, molybdenum, platinum and tantalum. 
     
     
         5 . The method of  claim 1 , wherein forming the device comprises forming a floating gate at least partially in the void that was occupied by the silicide. 
     
     
         6 . The method of  claim 1 , wherein forming the silicide further comprises forming the silicide in the tier of semiconductor material between tiers of dielectric material. 
     
     
         7 . A method comprising:
 forming metal on a plurality of tiers of semiconductor material and a plurality of tiers of dielectric material;   converting at least some of the metal into a silicide;   at least substantially removing the silicide to leave a respective void in each tier of semiconductor material between respective tiers of the dielectric material; and   forming a respective device at least partially in each of the voids.   
     
     
         8 . The method of  claim 7 , further comprising:
 forming a channel through the tiers of semiconductor material and the tiers of dielectric material, wherein forming the metal comprises depositing the metal on the tiers of semiconductor material and the tiers of dielectric material inside the channel.   
     
     
         9 . The method of  claim 8 , wherein:
 the tiers of semiconductor material and the tiers of dielectric material comprise alternating tiers of polysilicon and the tiers of dielectric material; and   forming a channel comprises etching a channel through the alternating tiers of polysilicon and the tiers of dielectric material.   
     
     
         10 . The method of  claim 7 , wherein the dielectric material comprises silicon dioxide. 
     
     
         11 . The method of  claim 7 , wherein converting at least some of the metal comprises annealing the metal and the semiconductor material to cause at least some of the metal to react with the semiconductor material to become the silicide. 
     
     
         12 . The method of  claim 7 , wherein the semiconductor material comprises p type silicon. 
     
     
         13 . A method comprising:
 forming a channel at least partially through a semiconductor construction comprising a plurality of tiers of dielectric material interleaved with a plurality of tiers of semiconductor material;   forming metal in the channel on the tiers of dielectric material and the tiers of semiconductor material;   forming portions of silicide from the metal and the tiers of semiconductor material;   at least substantially removing any of the metal remaining after the portions of silicide have been formed;   at least substantially removing the portions of silicide to leave voids in the tiers of semiconductor material; and   forming devices at least partially in the voids.   
     
     
         14 . The method of  claim 13 , wherein the semiconductor material comprises n type silicon. 
     
     
         15 . The method of  claim 13 , wherein forming the portions of silicide further comprises annealing the metal and the tiers of semiconductor material to cause the metal to react with the tiers of semiconductor material to form the portions of silicide. 
     
     
         16 . The method of  claim 15 , wherein:
 annealing the metal and the tiers of semiconductor material comprises annealing the metal and the tiers of semiconductor material in a first anneal to form the portions of silicide; and   annealing the portions of silicide and the tiers of semiconductor material in a second anneal to form portions of di-silicide.   
     
     
         17 . The method of  claim 15 , wherein annealing the metal and the tiers of semiconductor material further comprises annealing the metal and the tiers of semiconductor material with a Rapid Thermal Processing (RTP) anneal. 
     
     
         18 . The method of  claim 13 , wherein forming portions of silicide from the metal and the tiers of semiconductor material comprises forming residual silicide selected from a group consisting of platinum silicide, platinum di-silicide, molybdenum silicide, molybdenum di-silicide, cobalt silicide, cobalt di-silicide, titanium silicide, titanium di-silicide, tungsten silicide, tungsten di-silicide, nickel silicide, nickel di-silicide, tantalum silicide and/or tantalum di-silicide. 
     
     
         19 . The method of  claim 13 , wherein forming the channel at least partially through the semiconductor construction comprising the plurality of tiers of dielectric material interleaved with the plurality of tiers of semiconductor material comprises forming the channel at least partially through the semiconductor construction comprising a plurality of tiers of silicon dioxide interleaved with a plurality of tiers of polysilicon. 
     
     
         20 . The method of  claim 13 , wherein forming the metal in the channel on the tiers of dielectric material and the tiers of semiconductor material comprises forming one of the following metals: cobalt (Co), titanium (Ti), tungsten (W), nickel (Ni), tantalum (Ta), platinum (Pt) or molybdenum (Mo).