US2015046640A1PendingUtilityA1

Method for Utilizing a Memory Interface to Control Partitioning of a Memory Module

54
Assignee: MEMORY TECHNOLOGIES LLCPriority: Feb 11, 2010Filed: Sep 24, 2014Published: Feb 12, 2015
Est. expiryFeb 11, 2030(~3.6 yrs left)· nominal 20-yr term from priority
G06F 3/0631G06F 3/0619G06F 12/0246G06F 2212/7211G06F 3/0644G06F 12/0623G06F 3/0679G06F 2212/7204G06F 2206/1014
54
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

Described herein are at least one apparatus and methods for implementing partitioning in memory cards and modules. A representative memory card/module in accordance with the invention may include a memory device(s), and a memory interface which includes a data bus, a command line and a clock line. The memory card/module may further include a memory controller coupled to the memory device(s) and to the memory interface. The memory card/module may include means for controlling the partitioning of the memory device(s). The memory controller may be configured to operate the memory device(s) in accordance with the partition information.

Claims

exact text as granted — not AI-modified
1 . (canceled) 
     
     
         2 . A memory module comprising:
 at least one memory device;   a memory interface;   a memory controller coupled to the at least one memory device and to the memory interface, the memory controller configured to perform acts comprising:
 receiving partition information associated with the at least one memory device; 
 based at least in part on the partition information, logically partitioning the at least one memory device to enable one or more partitions of the at least one memory device; and 
 operating the at least one memory device in accordance with the partition information, the partition information comprising size information indicating a size of the one or more partitions and protection information indicating whether at least one of the one or more partitions is write protected. 
   
     
     
         3 . The memory module according to  claim 2 , wherein the partition information is included in a single command. 
     
     
         4 . The memory module according to  claim 2 , wherein the memory interface comprises a MultiMediaCard or Secure Digital (MMC/SD) card interface. 
     
     
         5 . The memory module according to  claim 2 , wherein the partitioning information further comprises at least one of:
 a start address and a stop address of each partition,   wear-leveling information associated with each partition,   a number of spare blocks associated with each partition, or   an indicator identifying whether each partition is a fixed partition or a reconfigurable partition.   
     
     
         6 . The memory module according to  claim 2 , wherein the at least one memory device comprises a flash memory. 
     
     
         7 . The memory module according to  claim 2 , wherein the at least one memory device and the memory controller are implemented on a single chip. 
     
     
         8 . The memory module according to  claim 2 , wherein the memory controller is configured to check a correctness of the partition information. 
     
     
         9 . A method comprising:
 receiving, by a memory controller that is coupled to at least one memory device and to a memory interface, partition information associated with the at least one memory device;   based at least in part on the partition information, logically partitioning the at least one memory device to enable one or more partitions of the at least one memory device; and   operating the at least one memory device in accordance with the partition information, the partition information comprising size information indicating a size of the one or more partitions and protection information indicating whether at least one of the one or more partitions is write protected.   
     
     
         10 . The method according to  claim 9 , wherein the partition information is included in a single command. 
     
     
         11 . The method according to  claim 9 , wherein the memory interface comprises a MultiMediaCard or Secure Digital (MMC/SD) card interface. 
     
     
         12 . The method according to  claim 9 , wherein the partitioning information further comprises at least one of:
 a start address and a stop address of each partition,   wear-leveling information associated with each partition,   a number of spare blocks associated with each partition, or   an indicator identifying whether each partition is a fixed partition or a reconfigurable partition.   
     
     
         13 . The method according to  claim 9 , wherein the at least one memory device comprises a flash memory. 
     
     
         14 . The method according to  claim 9 , wherein the at least one memory device and the memory controller are implemented on a single chip. 
     
     
         15 . The method according to  claim 9 , wherein the memory controller is configured to check a correctness of the partition information. 
     
     
         16 . A host device comprising:
 at least one memory device;   a memory interface;   a memory controller coupled to the at least one memory device and to the memory interface, the memory controller configured to perform acts comprising:
 receiving partition information associated with the at least one memory device; 
 based at least in part on the partition information, logically partitioning the at least one memory device to enable one or more partitions of the at least one memory device; and 
 operating the at least one memory device in accordance with the partition information, the partition information comprising size information indicating a size of the one or more partitions and protection information indicating whether at least one of the one or more partitions is write protected. 
   
     
     
         17 . The host device according to  claim 16 , wherein the partition information is included in a single command. 
     
     
         18 . The host device according to  claim 16 , wherein the memory interface comprises a MultiMediaCard or Secure Digital (MMC/SD) card interface. 
     
     
         19 . The host device according to  claim 16 , wherein the partitioning information further comprises at least one of:
 a start address and a stop address of each partition,   wear-leveling information associated with each partition,   a number of spare blocks associated with each partition, or   an indicator identifying whether each partition is a fixed partition or a reconfigurable partition.   
     
     
         20 . The host device according to  claim 16 , wherein the at least one memory device comprises a flash memory. 
     
     
         21 . The host device according to  claim 16 , wherein the at least one memory device and the memory controller are implemented on a single chip. 
     
     
         22 . The host device according to  claim 16 , wherein the memory controller is configured to check a correctness of the partition information.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.