Surface passivation of silicon based wafers

Abstract

The surface recombination velocity of a silicon sample is reduced by deposition of a thin hydrogenated amorphous silicon or hydrogenated amorphous silicon carbide film, followed by deposition of a thin hydrogenated silicon nitride film. The surface recombination velocity is further decreased by a subsequent anneal. Silicon solar cell structures using this new method for efficient reduction of the surface recombination velocity is claimed.

1 . A method for surface passivation of silicon based semiconductors, wherein the method comprises:
 cleaning the surface of the semiconductor that is to be passivated,   removing the oxide film on the surface of the semiconductor that is to be passivated,   depositing an amorphous silicon film directly on the surface of the semiconductor that is to be passivated,   depositing a silicon nitride film on top of the deposited amorphous silicon film, and   annealing the wafer with the deposited passivation at a temperature in the range from about 300 to about 600° C.   
     
     
         2 . The method according to  claim 1 , wherein—the cleaning of the surface of the semiconductor is obtained by immersion in a H 2 SO 4 :H 2 O 2  solution, and
 the removal of the oxide layer is obtained by immersion in diluted HF. 
 
     
     
         3 . The method according to  claim 1 ,
 wherein
 the deposition of the passivation layers is obtained by one or more of the following techniques; plasma enhanced chemical vapour deposition, low temperature chemical vapour deposition, low pressure chemical vapour deposition, or sputtering. 
   
     
     
         4 . The method according to  claim 3 ,
 wherein the deposition of the passivation layers is obtained by:
 introducing the cleaned semiconductor into a plasma enhanced chemical vapour deposition chamber, 
 depositing a 1-150 nm thick amorphous silicon film by use of SiH 4  as a precursor gas at about 250° C., 
 depositing a 10-200 nm thick silicon nitride film by use of a mixture of SiH 4  and NH 3  as precursor gases at about 250° C., and finally 
 annealing the wafer with the deposited passivation layers at a temperature in the range from about 350 to about 550° C. 
   
     
     
         5 . The method according to  claim 4 ,
 wherein
 the precursor gases used for plasma enhanced chemical vapor deposition of either the amorphous silicon layer, the silicon nitride layer, or both layers, also contain hydrogen gas. 
   
     
     
         6 . The method according to  claim 1 , wherein
 the amorphous silicon passivation layer is a silicon carbide film.   
     
     
         7 . The method according to  claim 6 ,
 wherein
 the first deposited passivation layer is a silicon carbide film of thickness 1-150 nm. 
   
     
     
         8 . A surface passivated silicon wafer comprising:
 a silicon semiconductor wafer of one type of conductivity (p- or n-type) having a at least one thin diffused layer of the other type conductivity (n- or p-type), and   a deposited dual surface passivation layer/film directly on at least the first (light receiving side) surface, the deposited dual surface passivation layer being made of a first layer of amorphous silicon film on the wafer and a second layer of silicon nitride film on the first layer,   
       wherein the wafer and the deposited dual layer is annealed at a temperature of 300-600° C. such that the surface region of the silicon wafer is at least partially saturated by in-diffusion of hydrogen atoms. 
     
     
         9 . The surface passivated silicon wafer according to  claim 8 ,
 wherein
 the first deposited passivation layer is a silicon carbide film. 
   
     
     
         10 . A solar cell comprising:
 a silicon semiconductor wafer of one type of conductivity (p- or n-type) having a at least one thin diffused layer of the other type conductivity (n- or p-type),   a deposited dual surface passivation layer/film directly on both a first surface (light receiving side) and a second surface (backside) of the silicon wafer, the deposited dual surface passivation layer being made of a first layer of amorphous silicon film on the wafer and a second layer of silicon nitride film on the first layer,   a current collection grid for the one polarity carrier deposited on top of the dual surface passivation layer on the first side of the wafer,   a current collection grid for the other polarity carrier deposited on top of the dual surface passivation layer on the backside of the wafer, and   soldering pads for interconnection of solar cells into a module,   
       wherein the wafer and the deposited dual layer is annealed at a temperature of 300-600° C. such that the surface region of the silicon wafer is at least partially saturated by in-diffusion of hydrogen atoms. 
     
     
         11 . The solar cell according to  claim 10 ,
 wherein the first deposited passivation layer is a silicon carbide film.   
     
     
         12 . A solar cell comprising:
 a silicon semiconductor wafer of one type of conductivity (p- or n-type) having a at least one thin diffused layer of the other type conductivity (n- or p-type),   a deposited dual surface passivation layer/film directly on a first surface (light receiving side) of the silicon wafer, the deposited dual surface passivation layer being made of a first layer of amorphous silicon film on the wafer and a second layer of silicon nitride film on the first layer, and   a current collection grid for the one polarity carrier and a current collection grid for the other polarity carrier deposited on a backside of the wafer,   
       wherein the wafer and the deposited dual layer is annealed at a temperature of 300-600° C. such that the surface region of the silicon wafer is at least partially saturated by in-diffusion of hydrogen atoms. 
     
     
         13 . The solar cell according to  claim 12 ,
 wherein the first deposited passivation layer is a silicon carbide film.