Frequency modulator having digitally-controlled oscillator with modulation tuning and phase-locked loop tuning

Abstract

A frequency modulator includes a digitally-controlled oscillator (DCO) arranged for producing a frequency deviation in response to a modulation tuning word and a phase-locked loop (PLL) tuning word. In addition, another frequency modulator includes a DCO and a DCO interface circuit. The DCO is arranged for producing a frequency deviation in response to an integer tuning word and a fractional tuning word. The DCO interface circuit is arranged for generating the integer tuning word and the fractional tuning word to the DCO, wherein the fractional tuning word is obtained through asynchronous sampling of a fixed-point tuning word.

What is claimed is: 
     
         1 . A frequency modulator comprising:
 a digitally-controlled oscillator (DCO), arranged for producing a frequency deviation in response to a modulation tuning word and a phase-locked loop (PLL) tuning word,   wherein samples of said modulating tuning word and said PLL tuning word are asynchronous.   
     
     
         2 . The frequency modulator of  claim 1 , wherein said modulating tuning word is distinct from said PLL tuning word at an interface of said DCO. 
     
     
         3 . The frequency modulator of  claim 1 , wherein said DCO has a first tuning port and a second tuning port, said first tuning port is arranged for receiving said modulation tuning word, and said second tuning port is arranged for receiving said PLL tuning word. 
     
     
         4 . The frequency modulator of  claim 1 , wherein said modulation tuning word is transmitted to said DCO via a first path in a digital domain, said PLL tuning word is transmitted to said DCO via a second path in said digital domain, and said first path and said second path are not merged in said digital domain. 
     
     
         5 . The frequency modulator of  claim 1 , wherein said modulation tuning word is transmitted to said DCO via a first path, said PLL tuning word is transmitted to said DCO via a second path, and said first path and said second path are merged in a capacitive domain of said DCO. 
     
     
         6 . The frequency modulator of  claim 1 , wherein said DCO comprises a plurality of separate varactor banks including at least a first varactor bank and a second varactor bank, a capacitive value of said first varactor bank is set in response to said modulation tuning word, and a capacitive value of said second varactor bank is set in response to said PLL tuning word. 
     
     
         7 . The frequency modulator of  claim 1 , wherein said DCO is part of an all-digital PLL (ADPLL). 
     
     
         8 . The frequency modulator of  claim 1 , wherein said modulation tuning word is generated in response to a phase-modulated (PM) data of a polar transmitter. 
     
     
         9 . A frequency modulator comprising:
 a digitally-controlled oscillator (DCO), arranged for producing a frequency deviation in response to a modulation tuning word and a phase-locked loop (PLL) tuning word,   wherein a sampling rate of said modulating tuning word is different from a sampling rate of said PLL tuning word.   
     
     
         10 . The frequency modulator of  claim 9 , wherein ratio of said sampling rate of said modulating tuning word and said sampling rate of said PLL tuning word is not an integer. 
     
     
         11 . The frequency modulator of  claim 9 , wherein said modulating tuning word is distinct from said PLL tuning word at an interface of said DCO. 
     
     
         12 . The frequency modulator of  claim 9 , wherein said DCO has a first tuning port and a second tuning port, said first tuning port is arranged for receiving said modulation tuning word, and said second tuning port is arranged for receiving said PLL tuning word. 
     
     
         13 . The frequency modulator of  claim 9 , wherein said modulation tuning word is transmitted to said DCO via a first path in a digital domain, said PLL tuning word is transmitted to said DCO via a second path in said digital domain, and said first path and said second path are not merged in said digital domain. 
     
     
         14 . The frequency modulator of  claim 9 , wherein said modulation tuning word is transmitted to said DCO via a first path, said PLL tuning word is transmitted to said DCO via a second path, and said first path and said second path are merged in a capacitive domain of said DCO. 
     
     
         15 . A frequency modulator comprising:
 a digitally-controlled oscillator (DCO), arranged for producing a frequency deviation in response to a modulation tuning word and a phase-locked loop (PLL) tuning word,   wherein a sampling rate of said modulating tuning word is dependent on said frequency deviation.   
     
     
         16 . The frequency modulator of  claim 15 , wherein a sampling rate of said PLL tuning word is independent from said frequency deviation. 
     
     
         17 . The frequency modulator of  claim 15 , wherein said modulating tuning word is distinct from said PLL tuning word at an interface of said DCO. 
     
     
         18 . The frequency modulator of  claim 15 , wherein said DCO has a first tuning port and a second tuning port, said first tuning port is arranged for receiving said modulation tuning word, and said second tuning port is arranged for receiving said PLL tuning word. 
     
     
         19 . The frequency modulator of  claim 15 , wherein said modulation tuning word is transmitted to said DCO via a first path in a digital domain, said PLL tuning word is transmitted to said DCO via a second path in said digital domain, and said first path and said second path are not merged in said digital domain. 
     
     
         20 . The frequency modulator of  claim 15 , wherein said modulation tuning word is transmitted to said DCO via a first path, said PLL tuning word is transmitted to said DCO via a second path, and said first path and said second path are merged in a capacitive domain of said DCO.