ESD Protection Devices and Methods

Abstract

Various embodiments described below relate to an ESD protection device that includes a voltage controlled shunt (e.g., a transistor) to selectively shunt energy of an incoming ESD pulse away from a circuit that includes a semiconductor device to be protected. In some embodiments, the ESD protection device includes a power up detection element to determine whether the circuit has powered up. If the circuit is powered up, the power up detection element prevents inadvertent triggering of the ESD protection device.

What is claimed is: 
     
         1 . An electrostatic discharge (ESD) protection device to protect a circuit coupled to first and second circuit nodes from an ESD event, the ESD protection device comprising:
 a first electrical path extending between the first and second circuit node and including a voltage controlled shunt thereon, the voltage controlled shunt having a control terminal to control an amount of energy shunted over the first electrical path via the voltage controlled shunt; and   a power up detection element comprising an input coupled to the circuit, and an output coupled to the control terminal of the voltage controlled shunt.   
     
     
         2 . The ESD protection device of  claim 1 :
 wherein the power up detection element monitors a voltage at the input to determine whether the circuit is powered up, and selectively asserts a power-up signal at the output based on whether the circuit is powered up; and   wherein voltage controlled shunt controls the amount of energy shunted over the first electrical path based on the power-up signal.   
     
     
         3 . The ESD protection device of  claim 1 , wherein the voltage controlled shunt comprises a drain extended metal oxide semiconductor (DEMOS) transistor. 
     
     
         4 . The ESD protection device of  claim 1 , further comprising:
 a second electrical path in parallel with the first electrical path and including an ESD detection element thereon.   
     
     
         5 . The ESD protection device of  claim 4 , wherein the ESD detection element is configured to selectively provide an ESD detection signal based on whether a voltage on the first circuit node exceeds a predetermined voltage threshold. 
     
     
         6 . The ESD protection device of  claim 4 , further comprising:
 a voltage bias element having first and second inputs coupled to the power up detection element and the ESD detection element, respectively, and having an output coupled to the control terminal of the voltage controlled shunt.   
     
     
         7 . The ESD protection device of  claim 6 , wherein the voltage controlled shunt comprises a drain extended metal oxide semiconductor (DEMOS) transistor. 
     
     
         8 . The ESD protection device of  claim 6 , wherein the voltage bias element comprises:
 a timing pulse generator coupled to the ESD detection element and configured to provide a shunt control signal having a predetermined duration based on whether the ESD detection element detects an ESD pulse; and   a noise immunity circuit to disable the energy transfer over the first electrical path based on whether the power up detection element detects the circuit is powered up.   
     
     
         9 . The ESD protection device of  claim 6 , wherein the voltage bias element selectively provides a shunt signal to the control terminal of the voltage controlled shunt based on both a power-up signal from the power up detection element and an ESD detection signal from the ESD detection element. 
     
     
         10 . The ESD protection device of  claim 6 , wherein, when the power up signal indicates the circuit is powered up, the voltage bias element sets a voltage level of the shunt signal to limit or prevent energy from being transferred over the voltage controlled shunt, regardless of a voltage level of the ESD detection signal. 
     
     
         11 . The ESD protection device of  claim 6 , wherein, when the power up signal indicates the circuit is not powered up, the voltage bias element sets a voltage level of the shunt signal based on the ESD detection signal to enable energy to be shunted over the first electrical path via the voltage controlled shunt. 
     
     
         12 . The ESD protection device of  claim 1 , wherein the voltage controlled shunt comprises:
 a first switching element in series with a second switching element along the first electrical path.   
     
     
         13 . An electrostatic discharge (ESD) protection device for protecting a semiconductor device of a circuit, the ESD protection device comprising:
 a power up detection element to monitor the circuit and provide a power up control signal indicative of whether the circuit is powered up;   an ESD detection element to monitor voltage on a first circuit node and provide an ESD pulse signal indicative of whether the monitored voltage is representative of an incoming ESD pulse;   a voltage controlled shunt coupled between the first circuit node and a second circuit node and which is arranged to selectively shunt energy of the incoming ESD pulse from the first circuit node to the second circuit node based on the ESD pulse signal and the power up control signal.   
     
     
         14 . The ESD protection device of  claim 13 , wherein the voltage controlled shunt comprises a drain extended metal oxide semiconductor (DEMOS) transistor. 
     
     
         15 . The ESD protection device of  claim 14 , further comprising a voltage bias element comprising:
 a pull-up device to pull up a control voltage based on the ESD detection signal; and   a pull-down device to pull down the control voltage based on the power up control signal;   wherein the control voltage is provided to a control terminal of the DEMOS transistor to control energy transfer thereover.   
     
     
         16 . The ESD protection device of  claim 15 , further comprising:
 a resistor in parallel with the pull down device and adapted to pull down the control voltage after the ESD pulse has passed.   
     
     
         17 . The ESD protection device of  claim 13 , wherein the power up detection element comprises a resistor and a capacitor coupled to a node on which the power up control signal is provided. 
     
     
         18 . The ESD protection device of  claim 13 , wherein the ESD detection element comprises: a resistor in series with a capacitor and having a node there between, wherein the node provides the ESD detection signal to the voltage controlled shunt through the voltage bias element. 
     
     
         19 . A method of electrostatic discharge (ESD) protection in a circuit, wherein the circuit includes a voltage controlled shunt that is coupled between first and second circuit nodes and which is arranged to selectively shunt energy of an incoming ESD pulse from the first circuit node to the second first circuit node and away from a semiconductor device to be protected on the circuit, the method comprising:
 monitoring voltage on the first circuit node and asserting an ESD detection signal for a predetermined time if the slope and magnitude of the voltage exceed predetermined thresholds;   monitoring the circuit and selectively asserting a power up control signal if the circuit is powered up;   providing a shunt control voltage to the voltage controlled shunt based on both the power up control signal and the ESD detection signal; wherein the voltage controlled shunt shunts energy of the incoming ESD pulse from the first circuit node to the second circuit node based on the shunt control signal.   
     
     
         20 . The method of  claim 20 , wherein the circuit comprises a system-on-chip (SoC) design that includes a number of blocks having different operating frequencies and different power supply domains.