US2015103957A1PendingUtilityA1

HART Sampling

Assignee: ROCKWELL AUTOMATION LTDPriority: Oct 10, 2013Filed: Oct 2, 2014Published: Apr 16, 2015
Est. expiryOct 10, 2033(~7.2 yrs left)· nominal 20-yr term from priority
H04L 27/144H04L 27/14H04L 27/106H04L 27/1563
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Claims

Abstract

A method for processing an electrical signal comprises receiving an electrical signal comprising a frequency modulated signal encoding digital data, sampling a first portion of the electrical signal to provide a first sample set, and determining an intermediate value from the first sample set. A first output value is selected from a plurality of stored output values based on the intermediate value, the output value indicating a frequency modulation encoded value within the first portion of the electrical signal. An indication of the obtained output value is output.

Claims

exact text as granted — not AI-modified
We claim: 
     
         1 . A method for processing an electrical signal comprising:
 receiving an electrical signal comprising a frequency modulated signal encoding digital data;   sampling a first portion of the electrical signal to provide a first sample set;   determining an intermediate value from the first sample set;   obtaining a first output value from a plurality of stored output values based on the determined intermediate value, the first output value indicating a frequency modulation encoded value within the first portion of the electrical signal; and   outputting an indication of the first output value.   
     
     
         2 . The method of  claim 1 , wherein the first output value is a HART data bit. 
     
     
         3 . The method of  claim 1 , wherein determining the intermediate value comprises determining a binary value associated with each of a plurality of samples in said first sample set, the intermediate value comprising said binary values. 
     
     
         4 . The method of  claim 1 , wherein sampling the first portion of the electrical signal comprises sampling the first portion of the electrical signal at a sample rate of 83.3 μs. 
     
     
         5 . The method of  claim 1 , wherein sampling the first portion of the electrical signal comprises obtaining ten samples from the first portion of the electrical signal such that the first sample set comprises ten samples. 
     
     
         6 . The method of  claim 1 , wherein said first portion is one of a plurality of sampled portions of the electric signal, each sampled portion providing a respective sample set. 
     
     
         7 . The method of  claim 6 , wherein the plurality of sampled portions are contiguous. 
     
     
         8 . The method of  claim 7 , wherein each of the plurality of sample sets differs from an immediately preceding one of the plurality of sample sets by a single sample such that the plurality of sample sets define a sliding window over the received electrical signal. 
     
     
         9 . The method of  claim 6 , wherein each, of said sample sets is associated with a respective count and the method further comprises selecting the first sample set from the plurality of sample sets based on a count associated with the first sample set. 
     
     
         10 . The method of  claim 9 , wherein the count is in a phase locked loop with respect to data bits encoded within the frequency modulated signal such that the count is synchronized with the data bits encoded within the frequency modulated signal. 
     
     
         11 . The method of  claim 10 , wherein the count associated with said first sample set indicates that the first sample set is associated with a substantially middle portion of a data bit encoded within the frequency modulated signal. 
     
     
         12 . The method of  claim 1 , further comprising:
 populating said plurality of stored output values, said populating comprising:   determining a plurality of possible intermediate values; and   for each of said possible intermediate values selecting a respective data bit for association with that intermediate value.   
     
     
         13 . The method of  claim 12 , wherein selecting the respective data bit for association with the intermediate value comprises applying a Fourier transform to the intermediate value and selecting a data bit in dependence upon the resulting frequency distribution. 
     
     
         14 . The method of  claim 13 , further comprising selecting a data bit value of ‘1’ when the resulting frequency distribution is primarily centered around 1200 Hz and selecting a data bit value of ‘0’ when the resulting frequency distribution is centered around 2200 Hz. 
     
     
         15 . An apparatus for processing an electrical signal comprising:
 a receiver arranged to receive an electrical signal comprising a frequency modulated signal encoding digital data;   a sampler arranged to sample a first portion of the electrical signal to provide a first sample set;   a memory storing a plurality of output values, each output value indicating a frequency modulation encoded value; and   a processing module arranged to process the first sample set to determine an intermediate value, to obtain a first output value associated with the first sample set from a plurality of stored output values based on the determined intermediate value, and to output an indication of the obtained output value.   
     
     
         16 . The apparatus of  claim 15 , wherein the sampler is arranged to sample the first portion of the electrical signal at a sample rate of 83.3 μs. 
     
     
         17 . The method of  claim 15 , wherein the sampler is arranged to sample a plurality of portions, and wherein the first portion is one of the plurality of sampled portions of the electric signal, each sampled portion providing a respective sample set. 
     
     
         18 . The apparatus of  claim 17 , wherein the processing module is arranged to associate each of said sample sets with a respective count and to select the first sample set horn the plurality of sample sets based on a count associated with the first sample set. 
     
     
         19 . The apparatus of  claim 18 , wherein the count is in a phase locked loop with respect to data bits encoded within the frequency modulated signal such that the count is synchronized with the data bits encoded within the frequency modulated signal. 
     
     
         20 . The apparatus of  claim 19 , wherein the count associated with said first sample set indicates that the first sample set is associated with a substantially middle portion of a data bit encoded within the frequency modulated signal.

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