Silicon Wafer Coated With A Passivation Layer

Abstract

Production of a silicon wafer coated with a passivation layer. The coated silicon wafer may be suitable for use in photovoltaic cells which convert energy from light impinging on the front face of the cell into electrical energy.

1 . A silicon wafer coated with silicon oxide, wherein the silicon oxide has negative fixed charges and comprises an interface region and a bulk region more remote from the silicon wafer than the interface region, wherein the bulk region has the formula SiO x  where x has a mean value (the bulk value) greater than 2 and less than 2.6 as measured by EELS-TEM, and the interface region has the formula SiO y  wherein the ratio y of oxygen to silicon gradually increases over the thickness of the interface region from zero at the silicon wafer to x in the bulk region, the thickness of the interface region being in the range 5 to 20 nm measured by TEM. 
     
     
         2 . A coated silicon wafer according to  claim 1 , wherein the silicon oxide contains Si—OH bonds, the ratio between the surface area of the Si—OH peak located at 3000 cm−1 to the surface area of the Si—O—Si peak located at 1060 cm −1  as measured by FTIR being between 0.05 and 0.8. 
     
     
         3 . A coated silicon wafer according to  claim 1 , wherein the total thickness of the silicon oxide is 60 to 500 nm. 
     
     
         4 . A coated silicon wafer according to  claim 3 , wherein the thickness of the interface region is 10 to 16 nm as measured by TEM. 
     
     
         5 . A coated silicon wafer according to  claim 1 , wherein the silicon oxide has a negative fixed charge of at least 1×1011 cm −2 , preferably between 2×1011 and 1×1012 cm −2 . 
     
     
         6 . A coated silicon wafer according to  claim 1 , wherein the density of interface traps is in the range 1.7×1010 eV −1  cm −2  to 1.7×1011 eV −1  cm −2  at the interface between the silicon and the silicon oxide, as measured by Capacitance-Voltage measurement on a complementary metal-oxide-semiconductor (CMOS) structure. 
     
     
         7 . A process for the production of a photovoltaic cell, wherein the silicon oxide layer of a silicon wafer coated with silicon oxide according to  claim 1  is hydrogenated and back contacts are formed through the silicon oxide layer. 
     
     
         8 . A process according to  claim 7  characterised in that the silicon oxide layer is hydrogenated by depositing a layer of a silicon nitride over the silicon oxide layer, and back contacts are formed through the silicon nitride and silicon oxide layers. 
     
     
         9 . Use of a silicon wafer coated with a silicon oxide layer in accordance with  claim 1  in a photovoltaic cell.