US2015137340A1PendingUtilityA1

Embedded package security tamper mesh

Assignee: BROADCOM CORPPriority: Dec 6, 2007Filed: Nov 13, 2014Published: May 21, 2015
Est. expiryDec 6, 2027(~1.4 yrs left)· nominal 20-yr term from priority
H10W 90/754H10W 74/00H10W 72/07554H10W 72/5449H10W 72/951H10W 72/932H10W 72/547H10W 72/075H10W 72/29H10W 76/40H10W 76/12H10W 74/117H10W 72/90H10W 72/072H10W 72/20H10W 42/405H10W 42/40G06F 21/87Y10S257/922G06F 2221/2143H01L 24/81H01L 23/04H01L 23/576H01L 24/17H01L 23/573
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Claims

Abstract

A secure integrated circuit package is provided. The secure integrated circuit package includes a first substrate having an upper surface and a lower surface. A first plurality of solder balls are arranged in a pattern on the lower surface of the first substrate. A die is coupled to the upper surface of the first substrate. A second plurality of solder balls is coupled to the upper surface of the substrate and arranged in a ring surrounding the die. A mesh substrate including a mesh protection grid is coupled to the second plurality of solder balls.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A secure integrated circuit package, comprising:
 a substrate including a plurality of outer contacts disposed on an upper surface of the substrate;   a die coupled to the upper surface of the substrate;   a mesh die coupled to an upper surface of the die, the mesh die including:
 a mesh protection grid, and 
 a plurality of mesh die pads disposed in a ring on an upper surface of the mesh die; and 
   a plurality of bond wires, wherein each bond wire from among the plurality of bond wires connects a mesh die pad from among the plurality of mesh die pads to a corresponding outer contact of the plurality of outer contacts to form a cage of bond wires surrounding the die.   
     
     
         2 . The secure integrated circuit package of  claim 1 , wherein the die includes a secure area. 
     
     
         3 . The secure integrated circuit package of  claim 1 , further comprising tamper detection logic located in the secure area of the die, wherein the mesh protection grid is coupled to the tamper detection logic. 
     
     
         4 . The secure integrated circuit package of  claim 1 , further comprising:
 a spacer die coupled between the die and the mesh die.   
     
     
         5 . A secure integrated circuit package, comprising:
 a substrate having an upper surface and a lower surface, wherein a first plurality of solder balls are arranged in a pattern on the lower surface of the substrate;   a die coupled to the upper surface of the substrate;   a second plurality of solder balls coupled to the upper surface of the substrate and arranged in a ring surrounding the die; and   a mesh substrate, including a mesh protection grid, the mesh substrate coupled to the second plurality of solder balls.   
     
     
         6 . The secure integrated circuit package of  claim 5 , wherein the die includes a secure area. 
     
     
         7 . The secure integrated circuit package of  claim 6 , further comprising:
 tamper detection logic, coupled to the mesh protection grid, located in the secure area.   
     
     
         8 . The secure integrated circuit package of  claim 5 , further comprising:
 an encapsulate covering the die.   
     
     
         9 . The secure integrated circuit package of  claim 8 , wherein a height of the second plurality of solder balls is greater than a height of the encapsulate. 
     
     
         10 . The secure integrated circuit package of  claim 5 , wherein the mesh protection grid comprises:
 a multi-layer mesh protection grid.   
     
     
         11 . The secure integrated circuit package of  claim 6 , wherein the secure area of the die comprises:
 a mesh driving circuit configured to drive the mesh protection grid.   
     
     
         12 . The secure integrated circuit package of  claim 11 , wherein the second plurality of solder balls is further coupled to the mesh driving circuit. 
     
     
         13 . The secure integrated circuit package of  claim 5 , wherein the second plurality of solder balls have minimal spacing between them. 
     
     
         14 . The secure integrated circuit package of  claim 5 , wherein the second plurality of solder balls have alternating polarity. 
     
     
         15 . A method to form a secure integrated circuit package, the method comprising:
 forming a first plurality of solder balls on a lower surface of a substrate;   coupling a die to an upper surface of the substrate;   forming a second plurality of solder balls in a ring surrounding the die on the upper surface the substrate; and   coupling a mesh substrate, including a mesh protection grid, to the second plurality of solder balls.   
     
     
         16 . The method of  claim 15 , further comprising:
 forming a secure area within the die.   
     
     
         17 . The method of  claim 16 , further comprising:
 forming tamper detection logic in the secure area.   
     
     
         18 . The method of  claim 15 , further comprising:
 forming an encapsulate over the die.   
     
     
         19 . The method of  claim 18 , wherein the forming the second plurality of solder balls comprises:
 forming the second plurality of solder balls such that a height of the second plurality of solder balls is greater than a height of the encapsulate.   
     
     
         20 . The method of  claim 15 , wherein the mesh protection multi-layer mesh protection grid.

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