Semiconductor device and method for manufacturing same

Abstract

This semiconductor device ( 100 ) includes a substrate ( 10 ) and a TFT which is provided on the substrate. The TFT includes a gate electrode ( 12 ), an oxide semiconductor layer ( 14 ) which faces the gate electrode, source and drain electrodes ( 16, 18 ) which are connected to the oxide semiconductor layer, and an insulating layer ( 22 ) which contacts at least partially with the source and drain electrodes. The insulating layer ( 22 ) includes a lower region ( 22 b ) which contacts at least partially with the source and drain electrodes and an upper region ( 22 a ) which is located over the lower region. The lower region ( 22 b ) has a higher hydrogen content than the upper region ( 22 a ).

1 . A semiconductor device comprising:
 a substrate;   a TFT which is provided on the substrate and which includes a gate electrode, a semiconductor layer that is arranged to face the gate electrode with a gate insulating film interposed therebetween, and source and drain electrodes that are electrically connected to the semiconductor layer; and   an insulating layer formed on the source and drain electrodes,   wherein the insulating layer includes a lower region which contacts at least partially with the upper surface of the source and drain electrodes and an upper region which is located over the lower region, and   the lower region has a higher hydrogen content than the upper region.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the surface of at least one of the source and drain electrodes that contacts with the insulating layer is made of Cu or Mo. 
     
     
         3 . The semiconductor device of  claim 1 , wherein the lower region of the insulating layer is made of SiO 2 . 
     
     
         4 . The semiconductor device of  claim 1 , wherein the semiconductor layer is an oxide semiconductor layer. 
     
     
         5 . The semiconductor device of  claim 4 , wherein the oxide semiconductor layer is an In—Ga—Zn—O based semiconductor layer. 
     
     
         6 . The semiconductor device of  claim 1 , wherein the insulating layer is a passivation layer which covers the TFT. 
     
     
         7 . The semiconductor device of  claim 1 , further comprising a channel protective layer which is arranged on the semiconductor layer to face the gap between the source and drain electrodes. 
     
     
         8 . A method for fabricating a semiconductor device, the method comprising the steps of:
 providing a substrate;   forming a TFT on the substrate, the TFT including a gate electrode, a semiconductor layer which is arranged to face the gate electrode with a gate insulating film interposed between them, and source and drain electrodes which are electrically connected to the semiconductor layer;   forming an insulating layer which contacts at least partially with the upper surface of the source and drain electrodes; and   conducting a heat treatment after performing the step of forming an insulating layer,   wherein the step of forming an insulating layer includes forming the insulating layer so that the content of hydrogen becomes higher in a region which is in contact with the source and drain electrodes than in a region which is out of contact with the source and drain electrodes.   
     
     
         9 . The method of  claim 8 , wherein the semiconductor layer is an oxide semiconductor layer. 
     
     
         10 . The method of  claim 9 , wherein the oxide semiconductor layer is an In—Ga—Zn—O based semiconductor layer. 
     
     
         11 . The method of  claim 8 , wherein the heat treatment is carried out at a temperature of 200° C. to 400° C. 
     
     
         12 . The method of  claim 8 , wherein the step of forming the insulating layer includes forming an SiO 2  layer using SiH 4  gas and N 2 O gas, and
 in the step of forming the SiO 2  layer, an SiH 4 /N 2 O flow rate ratio is changed.   
     
     
         13 . The method of  claim 8 , wherein the step of forming the insulating layer includes forming an SiO 2  layer by CVD process, and
 in the step of forming the SiO 2  layer, an output RF voltage of the CVD process is changed.   
     
     
         14 . The method of  claim 8 , wherein the step of forming the insulating layer includes forming an SiO 2  layer by CVD process, and
 in the step of forming the SiO 2  layer, a film deposition pressure of the CVD process is changed.   
     
     
         15 . The method of  claim 8 , wherein the step of forming the insulating layer includes forming a lower insulating layer by CVD process and forming an upper insulating layer on the lower insulating layer by sputtering process,
 wherein the lower and upper insulating layers are formed so that the content of hydrogen becomes higher in the lower insulating layer than in the upper insulating layer.