Pulse width modulation controller architectures
Abstract
Systems, apparatuses, and techniques for pulse width modulation (PWM) are described. A described system includes a circuit that contains an inductor and a transistor that controls current through the inductor based on a PWM signal to produce an output; and a controller to provide the PWM signal, which includes PWM cycles that include on-durations and off-durations. The controller can receive a first signal indicating an input voltage that is applied to the inductor, receive a second signal indicating a current through the inductor, use an on-duration parameter value to control the on-duration, determine a maximum off-duration of the off-durations corresponding to the PWM cycles occurring within a first voltage cycle, the first voltage cycle being defined between two consecutive zero-crossing events as indicated by the first signal, and adjust the on-duration parameter value for a second, subsequent voltage cycle based on the maximum off-duration to regulate the output voltage.
Claims
exact text as granted — not AI-modified1 . An apparatus comprising:
a first input interface to receive a first signal indicating a zero detection of an input voltage that is applied to an inductor of a circuit, the circuit being configured to produce an output signal with an output voltage; a second input interface to receive a second signal indicating a zero detection of a current through the inductor; circuitry to provide a pulse width modulation (PWM) signal that controls, via a switch, a current through the inductor based on an on-duration parameter value, the PWM signal comprising PWM cycles that each comprise an on-duration and an off-duration, wherein the on-duration parameter value controls an on-state duration of the switch, and wherein a start of each on-duration is triggered by a current trigger event indicated by the second signal; circuitry to determine a maximum off-duration of the off-durations corresponding to the PWM cycles occurring within a first voltage cycle, the first voltage cycle being defined between two consecutive zero-crossing events as indicated by the first signal; and circuitry to adjust the on-duration parameter value for a second, subsequent voltage cycle based on the maximum off-duration to regulate the output voltage.
2 . The apparatus of claim 1 , further comprising:
timer circuitry that includes a timer counter; circuitry to capture a value of the timer counter based on the current trigger event; and circuitry to reset the timer counter based on the current trigger event.
3 . The apparatus of claim 2 , further comprising:
a register; circuitry to perform a comparison between a value of the register and the value of the timer counter; and circuitry to load the register with the value of the timer.
4 . The apparatus of claim 1 , wherein the circuitry to adjust the on-duration parameter value is configured to adjust the on-duration parameter value further based on a maximum time that the inductor takes to demagnetize into a half period of input power during the first voltage cycle.
5 . The apparatus of claim 1 , wherein the circuitry to determine the maximum off-duration comprises circuitry to capture a maximum duration of a PWM cycle that occurs during the first voltage cycle, wherein the maximum off-duration is determined based on the maximum duration and the on-duration parameter value in use during the maximum duration.
6 . The apparatus of claim 1 , wherein the input voltage is supplied by an alternating current source, and wherein the circuitry to adjust the on-duration parameter value is programmed with a maximal voltage value associated with the alternating current source.
7 . A system comprising:
a circuit comprising an inductor and a transistor that controls current through the inductor based on a pulse width modulation (PWM) signal, the circuit being configured to produce an output signal with an output voltage; and a controller configured to provide the PWM signal, the PWM signal comprising PWM cycles that each comprise an on-duration and an off-duration, wherein the controller is configured to: receive a first signal indicating an input voltage that is applied to the inductor, receive a second signal indicating a current through the inductor, use an on-duration parameter value to control each on-duration, cause a start of each on-duration based on a current trigger event indicated by the second signal, determine a maximum off-duration of the off-durations corresponding to the PWM cycles occurring within a first voltage cycle, the first voltage cycle being defined between two consecutive zero-crossing events as indicated by the first signal, and adjust the on-duration parameter value for a second, subsequent voltage cycle based on the maximum off-duration to regulate the output voltage.
8 . The system of claim 7 , wherein the controller comprises:
timer circuitry that includes a timer counter; circuitry to capture a value of the timer counter based on the current trigger event; and circuitry to reset the timer counter based on the current trigger event.
9 . The system of claim 8 , wherein the controller comprises:
a register; circuitry to perform a comparison between a value of the register and the value of the timer counter; and circuitry to load the register with the value of the timer counter.
10 . The system of claim 7 , wherein the controller is configured to adjust the on-duration parameter value further based on a maximum time that the inductor takes to demagnetize into a half period of input power during the first voltage cycle.
11 . The system of claim 7 , wherein the controller is configured to capture a maximum duration of a PWM cycle that occurs during the first voltage cycle, wherein the maximum off-duration is determined based on the maximum duration and the on-duration parameter value in use during the maximum duration.
12 . The system of claim 7 , wherein the input voltage is supplied by an alternating current source, and wherein the controller is programmed with a maximal voltage value associated with the alternating current source.
13 . A system comprising:
a circuit comprising an inductor and a transistor that controls current through the inductor based on a pulse width modulation (PWM) signal, the circuit being configured to produce an output signal with an output voltage; a processor configured to provide an on-duration parameter value; and a controller, communicatively coupled with the processor, configured to provide the PWM signal, the PWM signal comprising PWM cycles that each comprise an on-duration and an off-duration, wherein the controller is configured to receive a first signal indicating an input voltage that is applied to the inductor, receive a second signal indicating a current through the inductor, use the on-duration parameter value to control each on-duration, cause a start of each on-duration based on a current trigger event indicated by the second signal, determine a maximum off-duration of the off-durations corresponding to the PWM cycles occurring within a first voltage cycle, the first voltage cycle being defined between two consecutive zero-crossing events as indicated by the first signal, and wherein the processor is configured to adjust the on-duration parameter value for a second, subsequent voltage cycle based on the maximum off-duration to regulate the output voltage.
14 . The system of claim 13 , wherein the controller comprises:
timer circuitry that includes a timer counter; circuitry to capture a value of the timer counter based on the current trigger event; and circuitry to reset the timer counter based on the current trigger event.
15 . The system of claim 14 , wherein the controller comprises:
a register; circuitry to perform a comparison between a value of the register and the value of the timer counter; and circuitry to load the register with the value of the timer counter.
16 . The system of claim 13 , wherein the processor is configured to adjust the on-duration parameter value further based on a maximum time that the inductor takes to demagnetize into a half period of input power during the first voltage cycle.
17 . The system of claim 13 , wherein the input voltage is supplied by an alternating current source, and wherein the processor is programmed with a maximal voltage value associated with the alternating current source.
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