US2015227832A1PendingUtilityA1

Rfid integrated circuits with antenna contacts on multiple surfaces

Assignee: IMPINJ INCPriority: Apr 11, 2012Filed: Aug 23, 2013Published: Aug 13, 2015
Est. expiryApr 11, 2032(~5.7 yrs left)· nominal 20-yr term from priority
G06K 19/07775G06K 19/0775G06K 19/07745G06K 19/07752Y10T29/49018G06K 19/07754G06K 19/07756
53
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Claims

Abstract

Embodiments are directed to a Radio Frequency Identification (RFID) integrated circuit (IC) having a first circuit block electrically coupled to first and second antenna contacts. The first antenna contact is disposed on a first surface of the IC and the second antenna contact is disposed on a second surface of the IC different from the first surface. The first and second antenna contacts are electrically disconnected from each other.

Claims

exact text as granted — not AI-modified
1 - 90 . (canceled) 
     
     
         91 . A method of manufacturing a Radio Frequency Identification (RFID) tag, comprising:
 disposing, onto a first portion of a substrate of the RFID tag, a dual-sided integrated circuit (IC) having a first antenna contact on a first external surface of the IC and a second antenna contact on a second external surface of the IC different from the first external surface of the IC;   forming an electrical connection between the first antenna contact and a first antenna terminal of the RFID tag; and   folding a second portion of the substrate onto the first portion of the substrate so as to form an electrical connection between the second antenna contact and a second antenna terminal of the RFID tag.   
     
     
         92 . The method of  claim 91 , further comprising:
 disposing the first antenna terminal on the first portion of the tag substrate; and   disposing the second antenna terminal on the first portion of the t substrate,   wherein the second portion of them substrate includes an electrical bridge.   
     
     
         93 . The method of  claim 91 , further comprising disposing the second antenna terminal on the second portion of the tag substrate. 
     
     
         94 . The method of  claim 91 , further comprising providing at least one of a dimple, a through-substrate hole, and a slot configured to at least partially contain the IC. 
     
     
         95 . The method of  claim 91 , further comprising:
 providing a through-substrate hole in the tag substrate, and   disposing the first antenna terminal on a back side of the tag substrate, such that the   through-substrate hole and the first antenna terminal form a pocket for the IC.   
     
     
         96 . The method of  claim 91 , further comprising providing at least one raised region on the tag substrate for guiding the positioning of the IC. 
     
     
         97 . A method of manufacturing a Radio Frequency Identification (RFID) tag, comprising:
 disposing, onto a first substrate of the RFID tag, a dual-sided integrated circuit (IC) having a first antenna contact on a first external surface of the IC and a second antenna contact on a second external surface of the IC different from the first external surface of the IC;   forming an electrical connection between the first antenna contact and a first antenna terminal of the RFID tag; and   disposing a second tag substrate onto the first tag substrate so as to form an electrical connection between the second antenna contact and a second antenna terminal of the RFID tag.   
     
     
         98 . The method of  claim 97 , further comprising disposing the second antenna terminal on the first tag substrate, wherein the second tag substrate includes an electrical bridge. 
     
     
         99 . The method of  claim 97 , further comprising disposing the second antenna terminal on the second tag substrate. 
     
     
         100 . The method of  claim 97 , further comprising providing at least one of a dimple, a through-substrate hole, and a slot configured to at least partially contain the IC. 
     
     
         101 . The method of  claim 97 , further comprising:
 providing a through-substrate hole in the first tag substrate, and   disposing the first antenna terminal on a back side of the first tag substrate;   wherein the through-substrate hole and the first antenna terminal form a pocket for the IC.   
     
     
         102 . The method of  claim 97 , further comprising providing at least one raised region on the first tag substrate for guiding the positioning of the IC. 
     
     
         103 . A method of manufacturing a Radio Frequency Identification (RFID) tag, comprising:
 disposing, onto a substrate of the RFID tag, a dual-sided integrated circuit (IC) having a first antenna contact on a first external surface of the IC and a second antenna contact on a second external surface of the IC different from the first external surface of the IC;   forming an electrical connection between the first antenna contact and a first antenna terminal of the RFID tag; and   depositing, on the tag substrate, a bridge that forms an electrical connection between the second antenna contact and a second antenna terminal of the RFID tag.   
     
     
         104 . The method of  claim 103 , wherein depositing the bridge includes at least one of printing the bridge onto the second antenna contact and depositing a bridge precursor onto the second antenna contact. 
     
     
         105 . The method of  claim 103 , further comprising processing the deposited bridge by applying at least one of heat and pressure to the deposited bridge. 
     
     
         106 . The method of  claim 103 , further comprising providing at least one of a dimple, a through-substrate hole, and a slot configured to at least partially contain the IC. 
     
     
         107 . The method of  claim 103 , further comprising:
 providing a through-substrate hole in the tag substrate, and disposing the first antenna terminal on a back side of the tag substrate;   wherein the through-substrate hole and the first antenna terminal form a pocket for the IC.   
     
     
         108 . The method of  claim 103 , further comprising providing at least one raised region on the tag substrate for guiding the positioning of the IC.

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