US2015263108A1PendingUtilityA1

Bipolar transistor device and method of fabrication

Assignee: NXP BVPriority: Mar 12, 2014Filed: Mar 12, 2015Published: Sep 17, 2015
Est. expiryMar 12, 2034(~7.6 yrs left)· nominal 20-yr term from priority
H10D 62/824H10D 64/117H10D 62/115H10D 10/891H10D 10/061H10D 10/60H10D 10/021H10D 10/80H01L 29/6625H01L 29/735H01L 29/737H01L 29/407H01L 29/66242
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Claims

Abstract

The disclosure relates to bipolar transistor devices and a method of fabricating the same. The device comprises a field plate, in an isolation region adjacent to a base-collector junction of said active region. The isolation region comprises a gate terminal arranged to be biased independently of a collector, base or emitter terminal of said transistor.

Claims

exact text as granted — not AI-modified
1 . A method of manufacturing a bipolar transistor, comprising:
 forming an isolation region in a substrate, said isolation region being adjacent to an active region of said bipolar transistor;   forming a dielectric on respective side walls of said isolation region and a base of said isolation region; and   depositing a semiconductor material in said isolation region so as to form a field plate, wherein said field plate is adjacent to a base-collector junction of said active region.   
     
     
         2 . The method of  claim 1 , whereby forming said dielectric comprises etching a dielectric material to define a gate dielectric in said isolation region. 
     
     
         3 . The method of  claim 1 , whereby forming said dielectric comprises depositing a dielectric material to define a gate dielectric in said isolation region. 
     
     
         4 . The method of  claim 1  wherein the semiconductor material deposited in said isolation region is a polycrystalline semiconductor material. 
     
     
         5 . The method of  claim 4 , wherein the polycrystalline semiconductor material comprises a base or an emitter of said bipolar transistor. 
     
     
         6 . The method of  claim 1  whereby forming said gate dielectric and said semiconductor material define a gate terminal of said transistor. 
     
     
         7 . The method of  claim 6 , whereby said gate terminal is arranged to be biased independently of a collector, base or emitter terminal of said transistor. 
     
     
         8 . A bipolar transistor, comprising:
 a substrate comprising an isolation region, said isolation region being adjacent to an active region of said bipolar transistor;   an dielectric on respective side walls of said first isolation region and a base of said isolation region;   a field plate formed of a semiconductor material in said isolation region, wherein said field plate is adjacent to a base-collector junction of said active region.   
     
     
         9 . The bipolar transistor of  claim 8 , wherein said dielectric defines a gate dielectric in said isolation region. 
     
     
         10 . The bipolar transistor of  claim 8  wherein said semiconductor material is a polycrystalline semiconductor material. 
     
     
         11 . The bipolar transistor of  claim 10 , wherein the polycrystalline semiconductor material comprises a base or an emitter of said bipolar transistor. 
     
     
         12 . The bipolar transistor of  claim 8 , wherein the gate dielectric and said semiconductor material define a gate terminal of said transistor. 
     
     
         13 . The bipolar transistor of  claim 12 , said gate terminal is arranged to be biased independently of a collector, base or emitter terminal of said transistor. 
     
     
         14 . An RF power amplifier comprising one or more bipolar transistors according to  claim 8 . 
     
     
         15 . An integrated circuit comprising one or more bipolar transistors according to  claim 8 .

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