Methods for forming ceramic substrates with via studs

Abstract

This document describes the fabrication and use of multilayer ceramic substrates, having one or more levels of internal thick film metal conductor patterns, wherein any or all of the metal vias intersecting one or both of the major surface planes of the substrates, extend out of the surface to be used for making flexible, temporary or permanent interconnections, to terminals of an electronic component. Such structures are useful for wafer probing, and for packaging, of the semiconductor devices.

What is the claimed is: 
     
         1 . A method to form a contactor, comprising:
 forming a contactor body,
 wherein the contactor body comprises a first substrate having a first surface, 
 wherein the contactor body comprises a plurality of via extensions, 
 wherein the plurality of via extensions protrude above the first surface, 
 wherein the plurality of via extensions comprises a first planarity variation; 
   forming a plurality of contactor terminals on a second substrate,
 wherein the plurality of contactor terminals comprises a second planarity variation, 
 wherein the second planarity variation is less than the first planarity variation; 
   bonding the via extensions to the contactor terminals;   removing the contactor terminals from the second substrate.   
     
     
         2 . A method as in  claim 1   wherein the first planarity variation is characterized as a height portion of at least a first via extension is different from the height portion of a second via extension.   
     
     
         3 . A method as in  claim 1   wherein the contactor terminals are configured to contact terminal pads of a device.   
     
     
         4 . A method as in  claim 1   wherein the first substrate comprises a second surface opposite the first surface,   wherein the plurality of via extensions also protrude above the second surface.   
     
     
         5 . A method as in  claim 1  further comprising:
 coating the second substrate with a releasable layer before forming the contactor terminals, 
 wherein removing the contactor terminals from the second substrate comprises releasing the releasable material. 
 
     
     
         6 . A method as in  claim 1  wherein forming the contactor terminals on the second substrate comprises
 forming a contact pattern on the semiconductor wafer; 
 depositing a conductive material in the contact pattern to form the contact contactor terminals. 
 
     
     
         7 . A method as in  claim 1  further comprising:
 coating a surface of the via extensions with a solder or solderable material before bonding the via extensions to the contactor terminals. 
 
     
     
         8 . A method as in  claim 1   wherein the plurality of contactor terminals are formed on a sacrificial metal layer on the second substrate.   
     
     
         9 . A method as in  claim 1   wherein the contactor terminals comprises dimples filled with a metal paste.   
     
     
         10 . A method as in  claim 1   wherein the paste filled dimples are densified to form tips and attached to the via extensions.   
     
     
         11 . A method to form a contactor, comprising:
 forming a contactor body,
 wherein the contactor body comprises a first substrate having a first surface, 
 wherein the contactor body comprises a plurality of via extensions, 
 wherein the plurality of via extensions protrude above the first surface; 
   forming a plurality of contactor terminals on a semiconductor wafer;   bonding the via extensions to the contactor terminals;   removing the contactor terminals from the semiconductor wafer.   
     
     
         12 . A method as in  claim 11  further comprising:
 coating the second substrate with a releasable layer before forming the contactor terminals. 
 wherein removing the contactor terminals from the second substrate comprises releasing the releasable material. 
 
     
     
         13 . A method as in  claim 11  wherein forming the contactor terminals on the second substrate comprises
 forming a contact pattern on the semiconductor wafer; 
 depositing a conductive material in the contact pattern to form the contact contactor terminals. 
 
     
     
         14 . A method as in  claim 11  further comprising:
 coating a surface of the via extensions with a solder or solderable material before bonding the via extensions to the contactor terminals. 
 
     
     
         15 . A method as in  claim 11   wherein the plurality of contactor terminals are formed on a sacrificial metal layer on the second substrate.   
     
     
         16 . A method to form a contactor, comprising:
 laminating a plurality of insulating layers with embedded interconnects and vias connecting within;   laminating a contact layer on the plurality of insulating layers, wherein the contact layer comprises embedded via extensions;   forming a plurality of contactor terminals on a semiconductor wafer;   aligning the via extensions with the contactor terminals;   removing the contactor terminals from the semiconductor wafer;   curing the laminating layers and the semiconductor wafer;   removing the cured contact layer, exposing the via extensions connected to the contactor terminals.   
     
     
         17 . A method as in  claim 16   wherein the contactor terminals are configured to contact terminal pads of a device.   
     
     
         18 . A method as in  claim 16  further comprising:
 contacting the via extensions to contact pads on a semiconductor wafer or chip; 
 testing the functionalities of the devices in the semiconductor wafer or chip through the contactor. 
 
     
     
         19 . A method as in  claim 16   wherein the contactor terminals comprises dimples filled with a metal paste.   
     
     
         20 . A method as in  claim 16   wherein the paste filled dimples are densified to form tips and attached to the via extensions.