US2015303167A1PendingUtilityA1
Semiconductor apparatus, method of manufacturing semiconductor apparatus, and electronic apparatus
Est. expiryAug 17, 2031(~5.1 yrs left)· nominal 20-yr term from priority
H10W 90/724H10W 90/722H10W 74/15H10W 74/012H10W 72/9415H10W 72/07338H10W 72/07255H10W 72/07236H10W 72/2528H10W 72/01265H10W 72/01236H10W 72/01233H10W 72/01225H10W 72/01215H10W 72/01208H10W 72/354H10W 72/255H10W 72/253H10W 72/252H10W 72/245H10W 72/241H10W 72/234H10W 72/224H10W 72/223H10W 72/222H10W 72/0198H10W 72/073H10W 72/072H10W 72/29H10W 90/701H10W 90/00H10F 39/804H10W 72/20H10F 39/011H01L 24/11H01L 2224/11848H01L 2224/11825H01L 2224/8102H01L 2224/81805H01L 24/81H01L 2225/06513H01L 2924/01029H01L 25/50
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Claims
Abstract
A semiconductor apparatus, including: a semiconductor component; a Cu stud bump that is formed on the semiconductor component; and a solder bump configured to electrically connect to the Cu stud bump.
Claims
exact text as granted — not AI-modified1 . A method of manufacturing a semiconductor apparatus, comprising:
forming a Cu stud bump on a semiconductor component; and flip-chip connecting the Cu stud bump to a solder bump.
2 . The method of manufacturing a semiconductor apparatus according to claim 1 , wherein heating is performed at 200° C. or lower in at least one of during the flip-chip connecting and after the flip-chip connecting.
3 . The method of manufacturing a semiconductor apparatus according to claim 1 further comprising:
forming a plating layer on a surface of the Cu stud bump by an electroless plating method.
4 . The method of manufacturing a semiconductor apparatus according to claim 3 , wherein the plating layer is formed directly on an outer surface of the Cu stud bump.
5 . The method of manufacturing a semiconductor apparatus according to claim 4 , wherein the plating layer is formed directly on an outer surface of the Cu stud bump that is not brought in contact with the solder bump.
6 . The method of manufacturing a semiconductor apparatus according to claim 3 , wherein the plating layer includes a Co plating layer and includes one of a plating layer of Ni or Au.
7 . The method of manufacturing a semiconductor apparatus according to claim 1 further comprising:
forming an alloy layer in between and immediately adjacent to each of the Cu stud bump and the solder bump such that the alloy layer is in contact with each of the Cu stud bump and the solder bump.
8 . The method of manufacturing a semiconductor apparatus according to claim 1 , wherein the solder bump for flip-chip connecting the Cu stud bump is formed of at least one material selected from among the group of In, SnBi, SnIn, and BiIn.Join the waitlist — get patent alerts
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