US2015303333A1PendingUtilityA1

Passivated upstanding nanostructures and methods of making the same

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Assignee: ZENA TECHNOLOGIES INCPriority: Sep 4, 2008Filed: May 5, 2015Published: Oct 22, 2015
Est. expirySep 4, 2028(~2.1 yrs left)· nominal 20-yr term from priority
H10H 29/142H10H 20/812H10F 99/00H10F 77/496H10F 77/315H10F 77/306H10F 77/206H10F 77/122H10F 55/17H10F 39/805H10F 39/107H10F 39/18H10F 30/2235H10F 30/225H10F 30/223H10F 77/1437H01L 31/02161H01L 27/14643H01L 31/028H01L 31/145H01L 31/02322H01L 31/022408H01L 31/035227H01L 31/02168H01L 31/1055H01L 27/1462H01L 31/107Y02E10/547
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Claims

Abstract

Described herein is a device comprising: a substrate; one or more of a nanostructure extending essentially perpendicularly from the substrate; wherein the nanostructure comprises a core of a doped semiconductor, an first layer disposed on the core, and a second layer of an opposite type from the core and disposed on the first layer.

Claims

exact text as granted — not AI-modified
What is claimed: 
     
         1 . A device comprising:
 a substrate;   one or more of a nanostructure extending essentially perpendicularly from the substrate;   wherein the nanostructure comprises a core of a doped semiconductor of a first type, a first layer comprising a lightly doped amorphous semiconductor or an intrinsic amorphous semiconductor, and a second layer comprising a heavily doped amorphous semiconductor layer of a second type opposite from the first type, wherein the first layer is disposed on the core and the second layer is disposed on the first layer;   wherein the first layer passivates at least a surface of the core;   wherein the first layer is disposed on an end surface of the core away from the substrate;   wherein sidewalls of the core are at least partially covered by an electrically insulating layer;   wherein the first layer and the second layer are coextensive with the electrically insulating layer in at least a direction parallel to the substrate.   
     
     
         2 . The device of  claim 1 , wherein the substrate comprises one or more materials selected from the group consisting of semiconductor, insulator and metal. 
     
     
         3 . The device of  claim 1 , wherein the core comprises one or more doped semiconductor material selected from the group consisting of doped silicon, doped germanium, doped III-V group compound semiconductor, doped II-VI group compound semiconductor, and doped quaternary semiconductor; wherein the first layer comprises one or more intrinsic amorphous semiconductor material selected from the group consisting intrinsic amorphous silicon, intrinsic amorphous germanium, intrinsic amorphous III-V group compound semiconductor and intrinsic amorphous II-VI group compound semiconductor; and wherein the second layer comprises one or more heavily doped amorphous semiconductor material selected from the group consisting heavily doped amorphous silicon, heavily doped amorphous germanium, heavily doped amorphous III-V group compound semiconductor and heavily doped amorphous II-VI group compound semiconductor. 
     
     
         4 . The device of  claim 1 , wherein the core is lightly doped. 
     
     
         5 . The device of  claim 1 , wherein the second layer comprises one or more heavily doped amorphous semiconductor material selected from the group consisting heavily doped amorphous silicon, heavily doped amorphous germanium, heavily doped amorphous III-V group compound semiconductor and heavily doped amorphous II-VI group compound semiconductor. 
     
     
         6 . The device of  claim 1 , wherein the second layer, the first layer and the core form a p-i-n junction. 
     
     
         7 . The device of  claim 8 , wherein the electrically insulating layer comprises one or more materials selected from the group consisting of HfO 2 , SiO 2 , Al 2 O 3 , and Si 3 N 4 . 
     
     
         8 . The device of  claim 1 , wherein the nanostructure is a nanowire or a nanoslab. 
     
     
         9 . The device of  claim 1 , wherein the device further comprises:
 a plurality of pixels;   a plurality of the nanostructures in each of the plurality of pixel,   wherein device is configured to be a solar-blind UV detector to detect UV radiation in the solar-blind UV region.   
     
     
         10 . The device of  claim 1 , wherein the device further comprises:
 a first subpixel;   a second subpixel adjacent to the first subpixel;   a first plurality of the nanostructures in the first subpixel and a second plurality of the nanostructures in the second subpixel, wherein the nanostructures in the first plurality are nanoslabs and extend essentially in parallel in a first direction parallel to the substrate and the nanostructures in the second plurality are nanoslabs and extend essentially in parallel in a second direction parallel to the substrate;   wherein the first direction and the second direction are different;   the first plurality of the nanostructures and the second plurality of the nanostructures react differently to the polarized light.   
     
     
         11 . The device of  claim 1 , wherein the device is configured to be a photovoltaic device and operable to convert light to electricity and further comprises a plurality of the nanostructures, one or more recesses between the nanostructures, each recess having a sidewall and a bottom wall, and a planar reflective layer disposed on the bottom wall of each recess, wherein the sidewall of each recess is free of the planar reflective layer. 
     
     
         12 . The device of  claim 1 , wherein the device is configured to be an image sensor and further comprises:
 a plurality of pixels each of which has at least one nanostructure;   a gate electrode surrounding the at least one nanostructure;   wherein the at least one nanostructure is adapted to convert light impinging thereon to electrical signals and the gate electrode is operable to pinch off or allow current flow through the at least one nanostructure.   
     
     
         13 . The device of  claim 1 , wherein the device is configured to be an image sensor and further comprises one or more of pixels on the substrate, wherein each of the pixels comprises a first subpixel and a second subpixel; the first subpixel comprises a first nanostructure of the one or more nanostructure operable to generate an electrical signal upon exposure to light of a first wavelength; the second subpixel comprises a second nanostructure of the one or more nanostructure operable to generate an electrical signal upon exposure to light of a second wavelength different from the first wavelength. 
     
     
         14 . The device of  claim 1 , wherein the device is configured to be an image sensor and the one or more nanostructures are on a substrate of a cavity, the nanostructures being configured to transmit a first portion of an electromagnetic radiation beam incident on the device, and the substrate comprising an anti-reflective material that absorbs a second portion of the electromagnetic radiation beam incident on the device, wherein the first portion is substantially different from the second portion, wherein the anti-reflective material absorbs at least 68 percent of optical light incident on the anti-reflective material, and wherein the anti-reflective material does not disrupt an electronic surface properties of epitaxial silicon to cause surface current leakage or provide sites for recombination of carriers generated by photons when the anti-reflective material is contacted with epitaxial silicon. 
     
     
         15 . The device of  claim 1 , further comprising an active region to produce light, a optical sensor and a electronic circuit, wherein the one or more nanostructure protrudes from a first side the substrate, the optical sensor is configured to detect at least a first portion of the light produced in the active region, and the electronic circuit is configured to control an electrical parameter that controls a light output of the active region. 
     
     
         16 . The device of  claim 1 , wherein the one or more nanostructure is fluorescent and arranged in an array; and the device further comprises a reflective layer at least disposed on the substrate in at least a portion of areas between the one or more fluorescent nanostructure; wherein the one or more fluorescent nanostructure is operable to fluoresce at a wavelength of a collective mode of the array. 
     
     
         17 . The device of  claim 1 , wherein the heavily doped amorphous semiconductor layer has doping levels merged into an impurity band. 
     
     
         18 . The device of  claim 1 , wherein the heavily doped amorphous semiconductor layer does not show an increase in conductivity with temperature. 
     
     
         19 . The device of  claim 1 , wherein the first layer eliminates dangling bonds on the at least surface of the core.

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