US2015326209A1PendingUtilityA1

Semiconductor device and control method thereof

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Assignee: RENESAS ELECTRONICS CORPPriority: Jul 31, 2012Filed: Jul 18, 2015Published: Nov 12, 2015
Est. expiryJul 31, 2032(~6.1 yrs left)· nominal 20-yr term from priority
H03B 2200/0082H03B 2200/0088H03B 5/364H03B 2200/005H03B 2200/0094H03B 2200/0046H03B 5/366H03B 5/36H03K 3/02
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Claims

Abstract

The present invention provides a semiconductor device including a first terminal and a second terminal respectively coupled to both ends of a crystal resonator, an inverter circuit having an input coupled to the first terminal and an output coupled to the second terminal, a feedback resistor which couples between the first terminal and the second terminal, a variable capacitor coupled to at least one of the first and second terminals, and a control circuit. The control circuit performs control to increase both of the drive capability of the inverter circuit and the capacitance value of the variable capacitor in a second mode rather than a first mode.

Claims

exact text as granted — not AI-modified
1 - 15 . (canceled) 
     
     
         16 . A oscillator circuit comprising:
 a crystal resonator;   first and second terminals respectively coupled to both ends of the crystal resonator;   an inverter circuit having an input coupled to the first terminal and an output coupled to the second terminal;   a feedback resistor which couples between the first terminal and the second terminal;   a variable capacitor coupled to at least one of the first and second terminals; and   a control circuit which controls a drive capability of the inverter circuit and a capacitance value of the variable capacitor, based on a mode signal which specifies each of first and second modes,   wherein the control circuit performs control to increase both of the drive capability of the inverter circuit and the capacitance value of the variable capacitor in the second mode rather than the first mode,   wherein upon switching from the first mode to the second mode, the control circuit increases the capacitance value of the variable capacitor after having increased the drive capability of the inverter circuit, and   wherein upon switching from the second mode to the first mode, the control circuit decreases the drive capability of the inverter circuit after having decreased the capacitance value of the variable capacitor.   
     
     
         17 . The oscillator circuit according to  claim 16 , further including:
 a comparator circuit which is coupled to the second terminal and generates a clock signal from a voltage of the second terminal; and   a frequency dividing circuit which performs a frequency division of the clock signal outputted from the comparator circuit,   wherein the control circuit changes a frequency dividing ratio of the frequency dividing circuit in response to the mode signal in such a manner that the frequency of the clock signal becomes identical between the first mode and the second mode.   
     
     
         18 . The oscillator circuit according to  claim 16 ,
 wherein the second mode is a debug mode which performs emulation of a semiconductor device, and   wherein the first mode is a mode which does not perform the emulation.   
     
     
         19 . The oscillator circuit according to  claim 18 , wherein a pin used in the emulation is adjacent to a pin coupled to the crystal resonator. 
     
     
         20 . The oscillator circuit according to  claim 19 , wherein the variable capacitor is coupled to only one of the first and second terminals, and
 wherein the pin used in the emulation is closer to the one of the first and second terminals than the other of the first and second terminals.   
     
     
         21 . The oscillator circuit according to  claim 16 ,
 wherein the second mode is a mode which permits switching of a power supply voltage of a semiconductor device, and   wherein the first mode is a mode which prohibits switching of the power supply voltage.   
     
     
         22 . A semiconductor device comprising:
 the oscillator circuit according to  claim 21 ;   a clock circuit which operates based on a clock signal generated by the oscillator circuit;   a power supply switching circuit which switches power supply voltage supplied to the oscillator circuit and the clock circuit between a normal power supply voltage and a backup power supply voltage; and   a controller which controls the power supply switching circuit in such a manner that when the normal power supply voltage reaches a predetermined threshold value or less, the power supply voltage is switched from the normal power supply voltage to the backup power supply voltage, and that when the normal power supply voltage reaches the predetermined threshold value or more, the power supply voltage is switched from the backup power supply voltage to the normal power supply voltage,   wherein the controller generates the mode signal, based on the switching of the power supply voltage and outputs the mode signal to the control circuit.   
     
     
         23 . The semiconductor device according to  claim 22 ,
 wherein the controller controls the mode signal in such a manner that a mode is switched to the second mode prior to the switching of the power supply voltage and that the mode is switched to the first mode after the end of the switching of the power supply voltage.   
     
     
         24 . The oscillator circuit according to  claim 16 ,
 wherein the inverter circuit includes:   a transistor having a gate coupled to the first terminal, a drain coupled to the second terminal and a source coupled to a ground terminal; and   a variable current source which supplies a current to the second terminal,   wherein the control circuit controls a current supply capacity of the variable current source in response to the mode signal to thereby control the drive capability of the inverter circuit.   
     
     
         25 . The oscillator circuit according to  claim 16 , wherein the variable capacitor is coupled between the first terminal and the second terminal.

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