Semiconductor structure and method of forming the same

Abstract

A semiconductor structure is provided. An N-type epitaxial layer is disposed on an N-type substrate. The N-type epitaxial layer has at least one trench therein, wherein the trench has a straight sidewall. A first insulating layer is disposed on at least a portion of a surface of the trench. A silicon-containing layer is disposed in a lower portion of the trench and has at least one air gap therein. A first conductive layer is disposed in an upper portion of the trench. Two P-type well regions are disposed in the N-type epitaxial layer beside the trench. Two N-type source regions are respectively disposed in the P-type well regions beside the trench.

What is claimed is: 
     
         1 . A semiconductor structure, comprising:
 a substrate of a first conductivity type;   an epitaxial layer of the first conductivity type, disposed on the substrate and having at least one trench therein, wherein the trench has a straight sidewall;   a first insulating layer, disposed on at least a portion of a surface of the trench;   a silicon-containing layer, disposed in a lower portion of the trench and having at least one air gap therein;   a first conductive layer, disposed in an upper portion of the trench;   two well regions of a second conductivity type, disposed in the epitaxial layer beside the trench; and   two source regions of the first conductivity type, respectively disposed in the well regions beside the trench.   
     
     
         2 . The semiconductor structure of  claim 1 , wherein the first insulating layer and the silicon-containing layer comprise the same or different materials. 
     
     
         3 . The semiconductor structure of  claim 1 , wherein the silicon-containing layer comprises silicon oxide, amorphous silicon, porous silica, fluorinated silicon oxide, silicon nitride, silicon oxynitride, polysilicon or a combination thereof. 
     
     
         4 . The semiconductor structure of  claim 1 , wherein the first insulating layer covers an entire surface of the trench. 
     
     
         5 . The semiconductor structure of  claim 1 , wherein the first insulating layer covers a surface of the lower portion of the trench. 
     
     
         6 . The semiconductor structure of  claim 5 , further comprising:
 a second insulating layer, disposed between the first conductive layer and the epitaxial layer and between the first conductive layer and the silicon-containing layer; and   an air space, present between the silicon-containing layer and the second insulating layer and between the silicon-containing layer and the first insulating layer.   
     
     
         7 . The semiconductor structure of  claim 1 , wherein the silicon-containing layer further has a plurality of air cracks therein. 
     
     
         8 . The semiconductor structure of  claim 1 , further comprising:
 a plurality of pillars of the second conductivity type, separately disposed in the epitaxial layer.   
     
     
         9 . The semiconductor structure of  claim 1 , further comprising:
 a dielectric layer, disposed on the epitaxial layer;   a second conductive layer, disposed on the dielectric layer and electrically connected to the source regions via two contact plugs; and   two doped regions of the second conductivity type, respectively disposed in the well regions and around bottoms of the contact plugs.   
     
     
         10 . The semiconductor structure of  claim 1 , wherein the first conductivity type is N-type and the second conductivity type is P-type; or the first conductivity type is P-type and the second conductivity type is N-type. 
     
     
         11 . The method of forming a semiconductor device, comprising:
 forming an epitaxial layer of a first conductivity type on a substrate of the first conductivity type;   forming at least one trench in the epitaxial layer, wherein the trench has a straight sidewall;   forming a first insulating layer at least on a portion of a surface of the trench;   forming a silicon-containing layer in a lower portion of the trench, wherein the silicon-containing layer has at least one air gap therein;   forming a first conductive layer in an upper portion of the trench;   forming two well regions of a second conductivity type in the epitaxial layer beside the trench; and   forming two source regions of the first conductivity type respectively in the well regions beside the trench.   
     
     
         12 . The method of  claim 11 , wherein the steps of forming the silicon-containing layer comprises:
 forming a silicon-containing material layer on the substrate filling the trench in a manner such that the air gap is simultaneously formed in the silicon-containing material layer;   annealing the silicon-containing material layer; and   removing a portion of the silicon-containing material layer.   
     
     
         13 . The method of  claim 12 , wherein the silicon-containing material layer is formed by CVD, PVD or sputtering, and the annealing is performed at a temperature of about 1,000 to 1,200° C. for 10 to 180 minutes. 
     
     
         14 . The method of  claim 11 , wherein the step of forming the silicon-containing layer comprises:
 forming a silicon-containing material layer on the substrate filling the trench;   removing a portion of the silicon-containing material layer to form the silicon-containing layer; and   annealing the silicon-containing layer in a manner such that the air gap is simultaneously formed in the silicon-containing layer.   
     
     
         15 . The method of  claim 14 , wherein the silicon-containing material layer is formed by CVD, PVD or sputtering, and the annealing is performed at a temperature of 600 to 1,000° C. for 10 to 180 minutes. 
     
     
         16 . The method of  claim 14 , wherein during the annealing, an air space is simultaneously formed between the first insulating layer and the silicon-containing layer and between the second insulating layer and the silicon-containing layer, and a plurality of air cracks are simultaneously formed in the silicon-containing layer. 
     
     
         17 . The method of  claim 11 , wherein the first insulating layer and the silicon-containing layer comprise the same or different materials. 
     
     
         18 . The method of  claim 11 , wherein the silicon-containing layer comprises silicon oxide, amorphous silicon, porous silica, fluorinated silicon oxide, silicon nitride, silicon oxynitride, polysilicon or a combination thereof. 
     
     
         19 . The method of  claim 11 , further comprising, after the step of forming the epitaxial layer and before the step of forming the trench, forming a plurality of pillars of the second conductivity type separately in the epitaxial layer. 
     
     
         20 . The method of  claim 11 , further comprising:
 forming a dielectric layer on the epitaxial layer;   forming at least two openings penetrating through the dielectric layer and the source regions and extending into a portion of the well regions;   forming two doped regions of the second conductivity type respectively in the well regions around bottoms of the openings;   forming two contact plugs respectively in the openings; and
 forming a second conductive layer on the dielectric layer, wherein the second conductive layer is electrically connected to the source regions via the contact plugs.