Shingled solar cell module

Abstract

A high efficiency configuration for a solar cell module comprises solar cells arranged in a shingled manner to form super cells, which may be arranged to efficiently use the area of the solar module, reduce series resistance, and increase module efficiency.

What is claimed is: 
     
         1 . An apparatus comprising:
 a semiconductor wafer having a first surface including a first metallization pattern along a first outside edge, and a second metallization pattern along a second outside edge opposite to the first outside edge, the semiconductor wafer further comprising a first scribe line between the first metallization pattern and the second metallization pattern.   
     
     
         2 . An apparatus as in  claim 1  wherein the first metallization pattern comprises a discrete contact pad. 
     
     
         3 . An apparatus as in  claim 1  wherein the first metallization pattern comprises a first finger pointing away from the first outside edge toward the second metallization pattern. 
     
     
         4 . An apparatus as in  claim 3  wherein the first metallization pattern further comprises a bus bar running along the first outside edge and intersecting the first finger. 
     
     
         5 . An apparatus as in  claim 4  wherein the second metallization pattern comprises:
 a second finger pointing away from the second outside edge toward the first metallization pattern; and 
 a second bus bar running along the second outside edge and intersecting the second finger. 
 
     
     
         6 . An apparatus as in  claim 3  further comprising an electrically conductive adhesive running along the first outside edge and in contact with the first finger. 
     
     
         7 . An apparatus as in  claim 3  wherein the first metallization pattern further comprises a first bypass conductor. 
     
     
         8 . An apparatus as in  claim 3  wherein the first metallization pattern further comprises a first end conductor. 
     
     
         9 . An apparatus as in  claim 1  wherein the first metallization pattern comprises silver. 
     
     
         10 . An apparatus as in  claim 9  wherein the first metallization pattern comprises silver paste. 
     
     
         11 . An apparatus as in  claim 9  wherein the first metallization pattern comprises discrete contacts. 
     
     
         12 . An apparatus as in  claim 1  wherein the first metallization pattern comprises tin, aluminum, or another conductor less expensive than silver. 
     
     
         13 . An apparatus as in  claim 1  wherein the first metallization pattern comprises copper. 
     
     
         14 . An apparatus as in  claim 13  wherein the first metallization pattern comprises electroplated copper. 
     
     
         15 . An apparatus as in  claim 13  further comprising a passivation scheme to reduce recombination. 
     
     
         16 . An apparatus as in  claim 1  further comprising:
 a third metallization pattern on the first surface of the semiconductor wafer not proximate to the first outside edge or to the second outside edge; and 
 a second scribe line between the third metallization pattern and the second metallization pattern, wherein the first scribe line is between the first metallization pattern and the third metallization pattern. 
 
     
     
         17 . An apparatus as in  claim 16  wherein a ratio comprising:
 a first width defined between first scribe line and the second scribe line/a length of the semiconductor wafer, 
 
       is between about 1:2 to about 1:20. 
     
     
         18 . An apparatus as in  claim 17  wherein the length is about 156 mm or about 125 mm. 
     
     
         19 . An apparatus as in  claim 17  wherein the semiconductor wafer includes chamfered corners. 
     
     
         20 . An apparatus as in  claim 19  wherein:
 the first scribe line defines with the first outside edge, a first rectangular region comprising two chamfered corners and the first metallization pattern, the first rectangular region having an area corresponding to a product of the length and a second width greater than the first width, minus a combined area of the two chamfered corners; and 
 the second scribe line defines with the first scribe line, a second rectangular region not including chamfered corners and including the third metallization pattern, the second rectangular region having the area corresponding to a product of the length and the first width. 
 
     
     
         21 . An apparatus as in  claim 16  wherein the third metallization pattern comprises a finger pointing toward the second metallization pattern. 
     
     
         22 . An apparatus as in  claim 1  further comprising a third metallization pattern on a second surface of the semiconductor wafer opposite to the first surface. 
     
     
         23 . An apparatus as in  claim 22  wherein the third metallization pattern comprises a contact pad proximate to a location of the first scribe line. 
     
     
         24 . An apparatus as in  claim 1  wherein the first scribe line is formed by a laser. 
     
     
         25 . An apparatus as in  claim 1  wherein the first scribe line is in the first surface. 
     
     
         26 . An apparatus as in  claim 1  wherein first metallization pattern comprises a feature configured to confine spreading of an electrically conducting adhesive. 
     
     
         27 . An apparatus as in  claim 26  wherein the feature comprises a raised feature. 
     
     
         28 . An apparatus as in  claim 27  wherein the first metallization pattern comprises a contact pad, and the feature comprises a dam abutting and taller than the contact pad. 
     
     
         29 . An apparatus as in  claim 26  wherein the feature comprises a recessed feature. 
     
     
         30 . An apparatus as in  claim 29  wherein the recessed feature comprises a moat. 
     
     
         31 . An apparatus as in  claim 26  further comprising the electrically conducting adhesive in contact with the first metallization pattern. 
     
     
         32 . An apparatus as in  claim 31  wherein the electrically conducting adhesive is printed. 
     
     
         33 . An apparatus as in  claim 1  wherein the semiconductor wafer comprises silicon. 
     
     
         34 . An apparatus as in  claim 33  wherein the semiconductor wafer comprises crystalline silicon. 
     
     
         35 . An apparatus as in  claim 33  wherein the first surface is of n-type conductivity. 
     
     
         36 . An apparatus as in  claim 33  wherein the first surface is of p-type conductivity. 
     
     
         37 . An apparatus as in  claim 1  wherein:
 the first metallization pattern is 5 mm or less from the first outside edge; and 
 the second metallization pattern is 5 mm or less from the second outside edge. 
 
     
     
         38 . An apparatus as in  claim 1  wherein the semiconductor wafer includes chamfered corners, and the first metallization pattern comprises a tapered portion extending around a chamfered corner. 
     
     
         39 . An apparatus as in  claim 38  wherein the tapered portion comprises a bus bar. 
     
     
         40 . An apparatus as in  claim 38  wherein the tapered portion comprises a conductor connecting a discrete contact pad.