US2015373886A1PendingUtilityA1

Integral heater assembly and method for host board of electronic package assembly

Assignee: INTEGRATED MICROWAVE CORPPriority: Oct 18, 2011Filed: Aug 28, 2015Published: Dec 24, 2015
Est. expiryOct 18, 2031(~5.2 yrs left)· nominal 20-yr term from priority
Inventors:Jeffrey Sloane
H05K 1/0212H05B 3/026H05B 3/0014H05B 3/12H05B 3/06H05K 13/0486H05B 3/16H05K 1/181H05K 3/3494Y10T29/49822H05K 3/22Y10T29/49821H05K 2203/176H05K 1/141H05K 1/167
34
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A multilayer printed circuit board has an embedded heater layer having at least one elongated heater element trace of copper which is densely arranged in a predetermined circuitous path over at least part of the area of the board. The heater element has inputs configured for connection to a standard high current, low voltage power supply, and may also have ground connections for selective connection to a ground layer. The heater layer may be embedded in a carrier board of a surface mount module close to the lower solder interface layer, or may be embedded in a host board of an electronics assembly close to the mounting surface.

Claims

exact text as granted — not AI-modified
We claim: 
     
         1 . A multi-layer host board configured for carrying a plurality of electronic modules in an electronics package assembly, comprising:
 an upper mounting surface having mounting areas configured for surface mounting of a plurality of surface mount modules having lower solder interface layers of solder material; and   a heater layer embedded in the host board beneath the upper mounting surface, the heater layer having a plurality of heater zones at predetermined locations beneath the mounting areas of the upper layer, each heater zone being of dielectric material with a single elongate heater element of conductive material having a pair of spaced inputs for connection to a high current, low voltage power supply and extending between the inputs in a predetermined circuitous path across the heater zone.   
     
     
         2 . The host board of  claim 1 , wherein the heater elements are copper traces. 
     
     
         3 . The host board of  claim 1 , wherein portions of the heater layer outside the heater zones comprise a metallized ground plane. 
     
     
         4 . The host board of  claim 3 , further comprising ground connection points for selective connection of each heater element to the surrounding ground plane when the heater element is not in use. 
     
     
         5 . The host board of  claim 1 , wherein a dielectric layer is located above the heater layer and immediately adjacent the upper mounting surface. 
     
     
         6 . The host board of  claim 5 , wherein the dielectric layer has a thickness in the range from about 0.003 inches to about 0.006 inches. 
     
     
         7 . The host board of  claim 2 , wherein each copper trace has a power output of approximately ten watts when connected to a 3 amp power supply. 
     
     
         8 . The host board of  claim 2 , wherein each copper trace has a length of at least thirty inches. 
     
     
         9 . A method of removing a selected surface mount module of a plurality of surface mount modules attached to a mounting surface of a host board of an electronics package assembly, comprising:
 connecting a high current, low voltage power supply to a highly conductive, elongate heater element extending in a circuitous path across the area of a selected heater zone of a heater layer of the host board, the selected heater zone being located below the host board mounting surface and aligned beneath the selected surface mount module to be removed from the board;   heating the lower solder interface layer of the selected surface mount module with the heater element to the reflow temperature of the solder material forming the solder interface layer;   removing the selected surface mount module from the host board; and   disconnecting the heater element from the power supply.   
     
     
         10 . The method of  claim 9 , further comprising connecting selected additional heater elements in spaced heater zones of the heater layer to a high current, low voltage power supply, the additional heater elements being located in the host board beneath additionally selected surface mount modules to be removed from the host board, heating the lower solder interface layers of the additional surface mount modules with the respective heater elements to the reflow temperature of the solder material forming the solder interface layer, removing each selected surface mount module from the host board when the solder material is melted, and disconnecting the respective heater elements from the power supply when the associated surface mount modules are removed.

Join the waitlist — get patent alerts

Track US2015373886A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.