US2015380576A1PendingUtilityA1

Optoelectronic device with dielectric layer and method of manufacture

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Assignee: ALTA DEVICES INCPriority: Oct 13, 2010Filed: Sep 4, 2015Published: Dec 31, 2015
Est. expiryOct 13, 2030(~4.3 yrs left)· nominal 20-yr term from priority
Y02E10/544H10H 20/835H10H 20/82H10F 77/703H10F 77/413H10F 77/311H10F 77/147H10F 71/1276H10F 71/127H10F 71/00H10F 10/144H10F 71/139H01L 31/1892H01L 31/022425H01L 31/184H01L 31/02366H01L 31/0725H01L 31/02327H01L 31/0687H01L 31/02363
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Claims

Abstract

An optoelectronic device and a method for fabricating the optoelectronic device are disclosed. The optoelectronic device comprises a p-n structure, a patterned dielectric layer comprising a dielectric material and a metal layer disposed on the dielectric layer. The metal layer makes one or more contact to the p-n structure through the patterned dielectric layer. The dielectric material may be chemically resistant to acids and may provide adhesion to the p-n structure and the metal layer. The method for fabricating an optoelectronic device comprises providing a p-n structure, providing a dielectric layer on the p-n structure and providing a metal layer on the dielectric layer and then lifting the device off the substrate, such that after the lift off the p-n structure is closer than the patterned dielectric layer to a front side of the device; wherein the device comprises the p-n structure, the patterned dielectric layer, and the metal layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . An optoelectronic device comprising:
 a p-n structure;   a patterned dielectric layer on the p-n structure; and   a metal layer disposed on the dielectric layer;
 wherein the patterned dielectric layer comprises a dielectric material and wherein the dielectric material has a chemical resistance to acids and provides adhesion to the p-n structure and the metal layer; and 
 wherein the metal layer makes one or more contact to the p-n structure. 
   
     
     
         2 . The optoelectronic device of  claim 1 , wherein the p-n structure comprises one or more group III-V semiconductor layers. 
     
     
         3 . The optoelectronic device of  claim 1 , wherein the p-n structure comprises a physically textured surface. 
     
     
         4 . The optoelectronic device of  claim 1 , wherein the dielectric layer comprises dielectric materials that are resistant to etching by acids such as hydrochloric acid, sulfuric acid or hydrofluoric acid during an epitaxial lift off (ELO) process. 
     
     
         5 . The optoelectronic device of  claim 4 , wherein the dielectric materials are organic comprising any of polyolefin, polycarbonate, polyester, epoxy, fluoropolymer, derivatives thereof and combinations thereof. 
     
     
         6 . The optoelectronic device of  claim 4 , wherein the dielectric materials are inorganic comprising any of arsenic trisulfide, arsenic selenide, α-alumina (sapphire), magnesium fluoride, calcium fluoride, diamond, derivatives thereof and combinations thereof. 
     
     
         7 . The optoelectronic device of  claim 1 , wherein the dielectric layer is optically textured. 
     
     
         8 . The optoelectronic device of  claim 7 , wherein the optical texturing is accomplished by disposing particles from the group consisting of alumina, titania, silica, derivatives thereof and combinations thereof; wherein the particles are disposed any of between the p-n structure and the dielectric layer, within the dielectric layer, between the dielectric layer and the metal layer or a combination thereof. 
     
     
         9 . The optoelectronic device of  claim 1 , wherein the dielectric layer comprises a physically textured surface. 
     
     
         10 . The optoelectronic device of  claim 9 , wherein the physical texturing of the dielectric surface is achieved by any of etching, exposure to a plasma, particle blasting, mechanical imprinting, laser ablation, wet etch, dry etch and a combination thereof. 
     
     
         11 . The optoelectronic device of  claim 1 , wherein the dielectric layer comprises a surface diffraction grating. 
     
     
         12 . The optoelectronic device of  claim 11 , wherein the surface diffraction grating is achieved by mechanical imprinting. 
     
     
         13 . The optoelectronic device of  claim 1 , wherein the metal layer further comprises a metallic reflector layer. 
     
     
         14 . The optoelectronic device of  claim 13 , wherein the metallic reflector layer comprises a metal selected from the group consisting of silver, gold, aluminum, nickel, copper, platinum, palladium, molybdenum, tungsten, titanium, chromium, alloys thereof, derivatives thereof, and combinations thereof. 
     
     
         15 . The optoelectronic device of  claim 1 , wherein a plurality of apertures are disposed within the dielectric layer extending into the p-n structure. 
     
     
         16 . The optoelectronic device of  claim 15 , wherein the plurality of apertures comprise metallic reflector protrusions. 
     
     
         17 . The optoelectronic device of  claim 16 , wherein the metallic reflector protrusions comprise a metal selected from the group consisting of silver, gold, aluminum, nickel, copper, platinum, palladium, molybdenum, tungsten, titanium, chromium, alloys thereof, derivatives thereof, and combinations thereof. 
     
     
         18 . The optoelectronic device of  claim 1 , wherein the p-n structure comprises multiple p-n junctions. 
     
     
         19 . The optoelectronic device of  claim 1 , further including metallic contacts to the front side of the device, positioned such that the metallic contacts to the front side of the device and the locations at which the metal layer makes contact to the p-n structure are offset to prevent short circuits. 
     
     
         20 . The optoelectronic device of  claim 1 , wherein the device is a flexible single-crystal device. 
     
     
         21 . A method for fabricating an optoelectronic device comprising:
 providing a p-n structure;   patterning a dielectric layer on the p-n structure;
 and 
   disposing a metal layer on the dielectric layer;
 wherein the metal layer makes one or more contact to the p-n structure; and 
   then lifting the device off the substrate, such that after the lift off the p-n structure is closer than the patterned dielectric layer to a front side of the device; wherein the device comprises the p-n structure, the patterned dielectric layer, and the metal layer.   
     
     
         22 . The method of  claim 21 , wherein the p-n structure comprises one or more Group III-V semiconductor layers. 
     
     
         23 . The method of  claim 21 , wherein the p-n structure comprises a physically textured surface. 
     
     
         24 . The method of  claim 21 , wherein the dielectric layer comprises dielectric materials that are resistant to etching by acids such as hydrochloric acid, sulfuric acid or hydrofluoric acid during an epitaxial lift off (ELO) process. 
     
     
         25 . The method of  claim 21 , wherein the dielectric materials are organic comprising any of polyolefin, polycarbonate, polyester, epoxy, fluoropolymer, derivatives thereof and combinations thereof. 
     
     
         26 . The method of  claim 21 , wherein the dielectric materials are inorganic comprising any of arsenic trisulfide, arsenic selenide, α-alumina (sapphire), magnesium fluoride, derivatives thereof and combinations thereof. 
     
     
         27 . The method of  claim 21 , wherein the dielectric layer is provided by using any of spin coating, dip coating, spray coating, physical vapor deposition (PVD), plasma enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD), powder coating, sol gel, ion-beam assisted chemical vapor deposition (IBAD CVD), chemical bath deposition, inkjet printing, screen printing and lamination. 
     
     
         28 . The method of  claim 21 , wherein the patterning of the dielectric layer is done by using any of wet etching, dry etching, disposing dielectric layer using inkjet printing, photolithography, shadow masking, imprint lithography, laser ablation and screen printing. 
     
     
         29 . The method of  claim 21  wherein the dielectric layer is optically textured. 
     
     
         30 . The method of  claim 29 , wherein the optical texturing is accomplished by disposing particles from the group consisting of alumina, titania, silica, derivatives thereof and combinations thereof; wherein the particles are disposed any of between the p-n structure and the dielectric layer, within the dielectric layer, between the dielectric layer and the metal layer or a combination thereof. 
     
     
         31 . The method of  claim 21 , wherein the dielectric layer comprises a physically textured surface. 
     
     
         32 . The method of  claim 21 , wherein the metal layer further comprises a metallic reflector layer. 
     
     
         33 . The method of  claim 32 , wherein the metallic reflector layer comprises a metal selected from the group consisting of silver, gold, aluminum, nickel, copper, platinum, palladium, molybdenum, tungsten, titanium, chromium, alloys thereof, derivatives thereof, and combinations thereof. 
     
     
         34 . The method of  claim 21 , wherein a plurality of apertures are disposed within the dielectric layer extending into the p-n structure. 
     
     
         35 . The method of  claim 34 , wherein the plurality of apertures comprise metallic reflector protrusions. 
     
     
         36 . The method of  claim 35 , wherein the metallic reflector protrusions comprise a metal selected from the group consisting of silver, gold, aluminum, nickel, copper, platinum, palladium, molybdenum, tungsten, titanium, chromium, alloys thereof, derivatives thereof, and combinations thereof. 
     
     
         37 . The method of  claim 21 , wherein the p-n structure comprises multiple p-n junctions. 
     
     
         38 . The method of  claim 24 , further including metallic contacts to the front side of the device, positioned such that the metallic contacts to the front side of the device and the locations at which the metal layer makes contact to the p-n structure are offset to prevent short circuits.

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