Data path acceleration using hw virtualization

Abstract

A processing core includes a packet classifier, implemented in a single processing core, configured to classify incoming data packets into first data packets of a known data packet flow and into second data packets of an unknown data packet flow, a first path thread, implemented in the single processing core, configured to process ones of the first data packets at least by forwarding the first data packets to a destination that corresponds to a previously determined destination associated with the known data packet flow, and a second path thread, implemented in the single processing core, configured to process a received second data packet at least to determine a new data packet flow for the second data packet.

What is claimed is: 
     
         1 . A processing core, comprising:
 a packet classifier, implemented in a single processing core, configured to classify incoming data packets into first data packets of a known data packet flow and second data packets of an unknown data packet flow, wherein the packet classifier is further configured to:
 form an identifier using information obtained from a packet header of one of the incoming data packets, the information comprising an attribute of the one incoming data packet; and 
 map the one incoming data packet to one of the known data packet flow or the unknown data packet flow based on the attribute; 
   a first path thread, implemented in the single processing core, configured to process ones of the first data packets mapped to the known data packet flow by performing a first processing operation in a protected path, the protected path protecting the first processing operation from actions that interrupt the first processing operation; and   a second path thread, implemented in the single processing core, configured to process a received second data packet by performing a second processing operation that determines a new data packet flow for the second data packet.   
     
     
         2 . The processing core of  claim 1 , wherein the first processing operation comprises making a forwarding decision to decide a forwarding destination for the first data packets mapped to the known data packet flow, the forwarding destination comprising a previously determined destination associated with others of the first data packets mapped to the known data packet flow. 
     
     
         3 . The processing core of  claim 1 , wherein the attribute of the one incoming data packet comprises a destination of the one incoming data packet, and the packet classifier maps the one incoming data packet to the known data packet flow in response to determining that the attribute of the one incoming data packet indicates a known destination, and maps the one incoming data packet to the unknown data packet flow in response to determining that the attribute of the one incoming data packet indicates an unknown destination. 
     
     
         4 . The processing core of  claim 1 , wherein the protected path protects the first processing operation from actions that interrupt the first processing operation by prioritizing the first processing operation over a regular processing operation having a lower priority than a priority of the first processing operation. 
     
     
         5 . The processing core of  claim 1 , wherein the protected path implements fast interrupt requests (FIQ). 
     
     
         6 . The processing core of  claim 1 , wherein the processing core comprises an Advanced RISC Machine (ARM) architecture. 
     
     
         7 . The processing core of  claim 1 , wherein the known data packet flow comprises an artificial logical equivalent to a call or a connection. 
     
     
         8 . The processing core of  claim 1 , wherein the second processing operation comprises performing a Just-in-time (JIT) rule compilation based on the second data packet. 
     
     
         9 . The processing core of  claim 8 , wherein the JIT rule compilation comprises determining a rule to process the second data packet based on an attribute of the second data packet. 
     
     
         10 . The processing core of  claim 1 , wherein the first processing operation satisfies a first latency requirement, and the second processing operation satisfies a second latency requirement different from the first latency requirement. 
     
     
         11 . The processing core of  claim 10 , wherein the first latency requirement is a lower latency than the second latency requirement. 
     
     
         12 . A method of data processing, comprising:
 classifying, in a single processing core, incoming data packets into first data packets of a known data packet flow and second data packets of an unknown data packet flow, wherein classifying comprises:
 forming an identifier using information obtained from a packet header of one of the incoming data packets, the information comprising an attribute of the one incoming data packet; and 
 mapping the one incoming data packet to one of the known data packet flow or the unknown data packet flow based on the attribute; 
   processing, in the single processing core, ones of the first data packets mapped to the known data packet flow by performing a first processing operation in a protected path, the protected path protecting the first processing operation from actions that interrupt the first processing operation; and   processing, in the single processing core, a received second data packet by performing a second processing operation that determines a new data packet flow for the second data packet.   
     
     
         13 . The method of  claim 12 , wherein the first processing operation comprises making a forwarding decision to decide a forwarding destination for the first data packets mapped to the known data packet flow, the forwarding destination comprising a previously determined destination associated with others of the first data packets mapped to the known data packet flow. 
     
     
         14 . The method of  claim 12 , wherein the attribute of the one incoming data packet comprises a destination of the one incoming data packet, and the mapping comprises mapping the one incoming data packet to the known data packet flow in response to determining that the attribute of the one incoming data packet indicates a known destination, and mapping the one incoming data packet to the unknown data packet flow in response to determining that the attribute of the one incoming data packet indicates an unknown destination. 
     
     
         15 . The method of  claim 12 , wherein the protected path protects the first processing operation from actions that interrupt the first processing operation by prioritizing the first processing operation over a regular processing operation having a lower priority than a priority of the first processing operation. 
     
     
         16 . The method of  claim 12 , wherein the protected path implements fast interrupt requests (FIQ). 
     
     
         17 . The method of  claim 12 , wherein the processing core comprises an Advanced RISC Machine (ARM) architecture. 
     
     
         18 . The method of  claim 12 , wherein the known data packet flow comprises an artificial logical equivalent to a call or a connection. 
     
     
         19 . The method of  claim 12 , wherein the second processing operation comprises performing a Just-in-time (JIT) rule compilation based on the second data packet. 
     
     
         20 . The method of  claim 19 , wherein the JIT rule compilation comprises determining a rule to process the second data packet based on an attribute of the second data packet.