System and method for performing processing in a testing system

Abstract

System and methods can execute processes in a test system. A flexible platform may be provided for developing test programs for performing automated testing. For example, the tester and its instruments are isolated from the tester operating system, permitting any tester operating system to be used. In another example implementation, a user layer of the platform is isolated from the physical layer of the architecture, permitting hardware-independent test programs that can be created and used among different testers having different test hardware and software. In yet another implementation, execution of a test program is isolated from a tester platform operating system, permitting the test program to function independent from the tester platform. Functionality can be implemented on the platform such that functions are only added, and that existing links to functions are not broken, ensuring continued test system operation when new software, hardware and/or features are added to the platform.

What is claimed is: 
     
         1 . A computer implemented method for automated testing of computing equipment, the method comprising:
 performing a procedure on test hardware through a test program the procedure including a request for a test function;   decoupling the test program from the test hardware through an abstraction layer;   generating within the abstraction layer, a virtual instrument (“VI”) layer without hardware implementation-specific functionality;   receiving, by the VI layer, at least one request from the test program through at least one virtual instrument virtual instrument (“VI”) interface, wherein said VI interface is implemented as an add-only programming interface using a virtual instrument virtual function table to allow backward-compatible upgrades; (b) map the request from the test program into a function call to a hardware-specific physical instrument layer; (c) communicate the function call to at least one hardware-specific physical instrument layer;   receiving the function call from the virtual instrument layer through a virtual instrument (“VI”) to physical instrument interface (“PI”); and   communicating the function call to a hardware-specific physical instrument (“PI”) layer including at least one physical instrument (“PI”) module representing the hardware specific implementation of a test instrument, wherein said VI to PI interface is implemented as an add-only programming interface using a physical instrument virtual function table to allow backward-compatible upgrades; (b) map the functional call into a hardware specific instruction for at least one test instrument in the test hardware; and (c) communicate the hardware-specific instruction to the test instrument for execution.   
     
     
         2 . The method of  claim 1 , further comprising an act of updating at least one of the VI interface or VI to PI interface, wherein updates are generated only by adding additional functionality to at least one of the virtual instrument virtual function table or the physical instrument virtual function table to ensure backward compatibility. 
     
     
         3 . The method according to  claim 1 , wherein at least one virtual instrument interface further comprises a virtual multisite (“VMI”) interface. 
     
     
         4 . The method according to  claim 1 , wherein the abstraction layer further comprises a system physical instrument (“SystemPI”) interface to the platform. 
     
     
         5 . The method according to  claim 1 , wherein the abstraction layer further comprises a physical instrument (“PI”) interface to the platform. 
     
     
         6 . The method according to  claim 1 , wherein the abstraction layer further includes a system physical instrument (“SystemPI”) to virtual instrument (“VI”) interface. 
     
     
         7 . The method according to  claim 1 , wherein the abstraction layer further includes a system physical instrument (“SystemPI”) to physical instrument (“PI”) interface. 
     
     
         8 . The method according to  claim 1 , wherein the abstraction layer further includes a test program to virtual instrument (“VI”) interface. 
     
     
         9 . The method according to  claim 1 , wherein the abstraction layer further includes a test program to physical instrument (“PI”) interface. 
     
     
         10 . The method according to  claim 1 , wherein the abstraction layer further includes a platform to virtual instrument (“VI”) interface. 
     
     
         11 . The method according to  claim 1 , wherein the abstraction layer further includes a platform to physical instrument (“PI”) interface. 
     
     
         12 . The method according to  claim 1 , wherein the abstraction layer further includes a platform to virtual multisite instrument (“VMI”) interface. 
     
     
         13 . The method according to  claim 1 , further comprising displaying a graphical user interface adapted to guide a user through generation of an interface. 
     
     
         14 . The method according to  claim 1 , wherein displaying the graphical user interface includes an act of guiding the user through generation of an interface configured to manage communication between the abstraction layer and a test instrument. 
     
     
         15 . The method according to  claim 14 , wherein the method further comprises:
 generating an interface; and   mapping the plurality of function calls to instructions to be executed on test hardware.   
     
     
         16 . The method according to  claim 15 , wherein mapping the plurality of function calls includes mapping the plurality of function calls to a virtual instrument (“VI”) module. 
     
     
         17 . The method according to  claim 1 , wherein generating the virtual instrument layer includes generating a virtual instrument (“VI”) module and mapping the VI module to at least one hardware resource. 
     
     
         18 . The method according to  claim 17 , wherein managing execution of instructions on a hardware resource in response to requests. 
     
     
         19 . The method according to  claim 17 , wherein mapping to at least one resource includes mapping execution through at least one PI module for each of the at least one hardware resources. 
     
     
         20 . The method according to  claim 19 , wherein mapping includes mapping the VI module to a plurality of PI modules to render a virtual representation of a set of predefined hardware resources employed to test a particular device.