US2016004568A1PendingUtilityA1
Data processing system and method
Assignee: HEWLETT PACKARD DEVELOPMENT COPriority: Jan 31, 2007Filed: Sep 14, 2015Published: Jan 7, 2016
Est. expiryJan 31, 2027(~0.6 yrs left)· nominal 20-yr term from priority
G06F 9/505
43
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Claims
Abstract
A method of optimizing an application in a system having a plurality of processors, the method comprising: analyzing the application for a first period to obtain a first activity analysis; selecting one of the processors based on the activity analysis for running the application; and binding the application to the selected processor.
Claims
exact text as granted — not AI-modified1 .- 19 . (canceled)
20 . A system comprising:
a plurality of processors; and memory coupled to the plurality of processors, each processor of the plurality of processors being associated with a respective area of memory, the memory having instructions stored thereon that, when executed by at least one processor of the plurality of processors, cause the at least one processor to:
analyze an application for a first period to obtain a first application activity analysis that includes interactions of the application with areas of memory,
identify a target processor, of the plurality of processors, that is associated with an area of memory used by the application, according to the interactions of the application with areas of memory included in the first application activity analysis, and
bind the application to the target processor.
21 . The system of claim 20 , wherein the target processor is associated with an area of memory having a greatest number of interactions with the application in the first period, according to the first application activity analysis.
22 . The system of claim 20 , wherein the first application activity analysis includes utilization of each processor during the first period.
23 . The system of claim 22 , wherein the instructions that cause the at least one processor to identify the target processor are to identify the target processor from among processors with utilization, according to the first application activity analysis, below a threshold value.
24 . The system of claim 20 , further comprising instructions that, when executed by the at least one processor, cause the at least one processor to:
measure performance of the application for the first period to obtain a first performance analysis, measure performance of the application for a second period after binding of the application to the target processor, to obtain a second performance analysis, compare the first performance analysis and the second performance analysis, and undo the binding if comparison of the first performance analysis and the second performance analysis indicates that performance of the application has degraded after the binding.
25 . The system of claim 24 , wherein the comparison indicates that performance of the application has degraded if the first performance analysis has a higher cycles-per-instruction value than the second performance analysis.
26 . The system of claim 20 , wherein the application is of a plurality of applications, and
the instructions are to cause the at least one processor to:
analyze, over the first period, the plurality of applications to obtain respective first application activity analyses, the first application activity analyses including processor utilization percentage for respective applications,
choose, as selected applications, applications having greater processor utilization percentage than other applications of the plurality of applications,
create processor preference lists for respective selected applications, where a processor preference list for a selected application list the processors in decreasing order according to numbers of interactions between the processors and the selected application, and
bind each of the selected applications to a highest preference processor of a respective processor preference list, the highest preference processor having a total utilization during the first period below a threshold value.
27 . The system of claim 26 , wherein the applications having greater processor utilization percentage are applications having processor utilization percentage above a predetermined threshold or are a predetermined number of applications having highest processor utilization percentages.
28 . A method comprising:
analyzing an application for a first period to obtain a first application activity analysis that includes interactions of the application with areas of memory, where different areas of memory are associated with a respective processor of a plurality of processors; identifying a target processor, from the plurality of processors, that is associated with an area of memory used by the application, according to the interactions of the application with areas of memory included in the first application activity analysis; and binding the application to the target processor.
29 . The method of claim 28 , wherein the target processor is associated with an area of memory having a greatest number of interactions with the application in the first period, according to the first application activity analysis.
30 . The method of claim 28 , wherein the first application activity analysis includes utilization of each processor during the first period, and
the identifying the target processor identifies the target processor from among processors with utilization below a threshold value.
31 . The method of claim 28 , further comprising:
measuring performance of the application for the first period to obtain a first performance analysis, measuring performance of the application for a second period after binding of the application to the target processor, to obtain a second performance analysis; and undoing the binding if the first performance analysis has a higher cycles-per-instruction value than the second performance analysis.
32 . The method of claim 28 , further comprising:
analyzing, over the first period, a plurality of applications that includes the application, to obtain respective first application activity analyses, the first application activity analyses including processor utilization percentage for respective applications; choosing, as selected applications, applications having greater processor utilization percentage than other applications of the plurality of applications; creating processor preference lists for respective selected applications, where a processor preference list for a selected application list the processors in decreasing order according to numbers of interactions between the processors and the selected application; and binding each of the selected applications to a highest preference processor of a respective processor preference list, the highest preference processor having a total utilization during the first period below a threshold value.
33 . A non-transitory computer readable medium storing instructions executable by a processor of a system that has a plurality of processors and memory, the non-transitory computer readable medium comprising:
instructions to analyze an application for a first period to obtain a first application activity analysis that includes interactions of the application with areas of memory, where different areas of memory are associated with a respective processor of the plurality of processors; instructions to identify a target processor, from among the plurality of processors, that is associated with an area of memory used by the application, according to the interactions of the application with areas of memory included in the first application activity analysis; and instructions to bind the application to the target processor.
34 . The non-transitory computer readable medium of claim 33 , wherein the instructions to identify the target processor are to identify the target processor associated with an area of memory having a greatest number of interactions with the application in the first period, according to the first application activity analysis.
35 . The non-transitory computer readable medium of claim 33 , wherein the first application activity analysis includes utilization of each processor during the first period.
36 . The non-transitory computer readable medium of claim 35 , wherein the instructions to identify the target processor are to identify the target processor from among processors with utilization, according to the first application activity analysis, below a threshold value.
37 . The non-transitory computer readable medium of claim 33 , further comprising:
instructions to measure performance of the application for the first period to obtain a first performance analysis, instructions to measure performance of the application for a second period after binding of the application to the target processor, to obtain a second performance analysis; and instructions to undo the binding if the first performance analysis has a higher cycles-per-instruction value than the second performance analysis.
38 . The non-transitory computer readable medium of claim 33 , further comprising:
instructions to analyze, over the first period, a plurality of applications that includes the application, to obtain respective first application activity analyses, the first application activity analyses including processor utilization percentage for respective applications; instructions to choose, as selected applications, applications having greater processor utilization percentage than other applications of the plurality of applications; instructions to create processor preference lists for respective selected applications, where a processor preference list for a selected application list the processors in decreasing order according to numbers of interactions between the processors and the selected application; and instructions to bind each of the selected applications to a highest preference processor of a respective processor preference list, the highest preference processor having a total utilization during the first period below a threshold value.
39 . The non-transitory computer readable medium of claim 38 , wherein the applications having greater processor utilization percentage are applications having processor utilization percentage above a predetermined threshold or are a predetermined number of applications having highest processor utilization percentages.Cited by (0)
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