US2016005772A1PendingUtilityA1

Array substrate, manufacturing method thereof, and display device

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Assignee: BOE TECHNOLOGY GROUP CO LTDPriority: Sep 10, 2012Filed: Sep 14, 2015Published: Jan 7, 2016
Est. expirySep 10, 2032(~6.2 yrs left)· nominal 20-yr term from priority
H10P 50/00H10D 86/441H10D 86/60H10D 64/512H10D 30/6743H10D 30/6737H10D 30/673H10H 20/062H10D 86/021H01L 21/3213H01L 29/42384H01L 29/42356H01L 27/124H01L 27/1259
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Claims

Abstract

Embodiments of the invention provide an array substrate, a manufacturing method thereof and a display device. The array substrate comprises: a base substrate; a gate line and a gate electrode formed on the base substrate; a gate insulating layer formed on the gate line and the gate electrode; a source electrode, a drain electrode and a pixel electrode formed on the gate insulating layer, wherein the pixel electrode is directly connected to the drain electrode; and an active layer formed on the gate insulating layer, the source electrode and the drain electrode.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A manufacturing method of an array substrate, comprising:
 forming a gate line and a gate electrode on a base substrate;   forming a gate insulating layer on the gate line and the gate electrode;   forming a conductive layer on the gate insulating layer, and performing a patterning process on the conductive layer to form a drain electrode, a source electrode and a pixel electrode, wherein the pixel electrode is directly connected to the drain electrode; and   forming an active layer on the gate insulating layer, the source electrode and the drain electrode.   
     
     
         2 . The manufacturing method according to  claim 1 , wherein the step of forming the drain electrode, the source electrode and the pixel electrode comprises:
 sequentially forming at least two conductive layers on the gate insulating layer, and performing a patterning process on the at least two conductive layers to form the source electrode, the drain electrode and the pixel electrode.   
     
     
         3 . The manufacturing method according to  claim 2 , wherein the step of forming the drain electrode, the source electrode and the pixel electrode comprises:
 sequentially forming two conductive layers on the gate insulating layer, and performing a patterning process on the two conductive layers to form the source electrode, the drain electrode and the pixel electrode,   wherein the two conductive layers are a transparent electrode layer and a metal layer provided on the transparent electrode layer,   each of the source electrode and the drain electrode is formed by the transparent electrode layer and the metal layer, and the pixel electrode is merely formed by the transparent electrode layer.   
     
     
         4 . The manufacturing method according to  claim 1 , further comprising:
 forming a passivation layer on the source electrode, the drain electrode and the active layer;   forming a through hole in the passivation layer;   forming a data line on the passivation layer, wherein the data line is connected to the source electrode via the through hole.   
     
     
         5 . The manufacturing method according to  claim 1 , further comprising:
 forming an ohmic contact layer between the source electrode and the active layer as well as between the drain electrode and the active layer.

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