Semiconductor device and power conversion device using same

Abstract

The problem addressed by the present invention is to provide a semiconductor device capable of improving dv/dt controllability via a gate drive circuit during turn-on switching. The semiconductor device comprises a plurality of trench gate groups, each trench gate group including mutually adjoining three or more trench gates, and the distance between adjoining two trench gate groups is larger than the distance between adjoining two trench gates in one trench gate group. Thereby, gate-emitter capacity increases, and therefore the semiconductor device may improve dv/dt controllability via a gate drive circuit during turn-on switching.

1 . A semiconductor device, comprising:
 a first semiconductor layer of first conduction type;   a second semiconductor layer of second conduction type, the second semiconductor layer adjoining to the first semiconductor layer;   a plurality of third semiconductor layers of the first conduction type, the third semiconductor layers adjoining to the second semiconductor layer;   a plurality of fourth semiconductor layers of the second conduction type, the fourth semiconductor layers being provided on the surfaces of the third semiconductor layers;   a plurality of trench gates provided inside a plurality of trenches, the side walls of the trenches being the surfaces of the third semiconductor layers;   a first main electrode electrically connected to the first semiconductor layer; and   a second main electrode electrically connected to the plurality of third semiconductor layers and the plurality of fourth semiconductor layers, wherein   there are provided a plurality of trench-gate groups, each of the trench-gate groups including the three or more trench gates that adjoin to each other,   the spacing between the two trench-gate groups that adjoin to each other being wider than the spacing between the two trench gates that adjoin to each other in the one trench-gate group.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein
 the fourth semiconductor layers are provided on the surfaces of the third semiconductor layers to which the trench gates positioned at end portions of each of the trench-gate groups are opposed.   
     
     
         3 . The semiconductor device according to  claim 1 , wherein
 a floating fifth semiconductor layer of the second conduction type is provided between the trench-gate groups that adjoin to each other.   
     
     
         4 . The semiconductor device according to  claim 3 , wherein
 the fifth semiconductor layer is formed in such a manner as being deeper than the third semiconductor layers.   
     
     
         5 . The semiconductor device according to  claim 4 , wherein
 a partial portion of the second semiconductor layer intervenes between the fifth semiconductor layer and the trench gate.   
     
     
         6 . The semiconductor device according to  claim 1 , wherein
 a sixth semiconductor layer of the second conduction type is provided between the third semiconductor layers and the second semiconductor layer, the impurity concentration of the sixth semiconductor layer being higher than that of the second semiconductor layer.   
     
     
         7 . The semiconductor device according to  claim 6 , wherein
 a seventh semiconductor layer of the first conduction type is provided between the sixth semiconductor layer and the second semiconductor layer.   
     
     
         8 . The semiconductor device according to  claim 1 , wherein
 the plurality of trenches include   a first trench in which the trench gate positioned in the central portion of each of the trench-gate groups is formed; and   a second trench in which the trench gates positioned at end portions of each of the trench-gate groups are formed, the second trench being positioned between the two trench-gate groups that adjoin to each other,   the side walls of the second trench being the surfaces of the third semiconductor layers positioned at the end portions, and the bottom surface of the second trench being the surface of the second semiconductor layer, the width of the second trench being wider than the width of the first trench,   the trench gates positioned at the end portions of each of the trench-gate groups being opposed to the side walls.   
     
     
         9 . A power conversion device, comprising:
 a pair of DC terminals;   a plurality of in-series connection circuits connected to each other between the DC terminals, a plurality of semiconductor switching elements being connected to the plurality of in-series connection circuits in series with each other; and   a plurality of AC terminals connected to respective in-series connection points of the plurality of in-series connection circuits, wherein   power conversion is performed by the plurality of semiconductor switching elements' performing on/off switchings,   each of the plurality of semiconductor switching elements being the semiconductor device according to  claim 1 .