Three-Dimensional Offset-Printed Memory

Abstract

The present invention discloses a three-dimensional offset-printed memory (3D-oP). Compared with a conventional three-dimensional mask-programmed read-only memory (3D-MPROM), it has a lower data-mask count and thereby a lower data-mask cost. The mask-patterns for different memory levels/bits-in-a-cell are merged onto a multi-region data-mask. At different printing steps, a wafer is offset by different values with respect to said data-mask. Accordingly, data-patterns are printed into different memory levels/bits-in-a-cell from a same data-mask.

What is claimed is: 
     
         1 . A method of making a three-dimensional offset-printed memory (3D-oP), comprising the steps of:
 1) forming a substrate circuit on a semiconductor substrate;   2) forming a first memory level above said substrate, said first memory level comprising a first data-coding layer, wherein the data-pattern in said first data-coding layer is formed from a first portion of a data-mask;   3) forming a second memory level above said first memory level, said second memory level comprising a second data-coding layer, wherein the data-pattern in said second data-coding layer is formed from a second portion of said data-mask;   wherein said first and second portions are on a same data-mask.   
     
     
         2 . The method according to  claim 1 , wherein said substrate is aligned to a first position on said data-mask when forming the data-pattern in said first data-coding layer. 
     
     
         3 . The method according to  claim 2 , wherein said substrate is aligned to a second position on said data-mask when forming the data-pattern in said second data-coding layer. 
     
     
         4 . The method according to  claim 3 , wherein said second position is offset by a distance from said first position. 
     
     
         5 . The method according to  claim 1 , wherein the data-patterns are formed using photo-lithography or imprint-lithography. 
     
     
         6 . The method according to  claim 1 , wherein the total number of data-masks is fewer than the total number of data-coding layers.  
     
     
         7 . The method according to  claim 1 , wherein said 3D-oP further comprises a configurable-input/output (I/O) means for configuring the input of said memory based on the data-array sequence in said memory. 
     
     
         8 . The method according to  claim 7 , wherein said configurable-I/O means further comprises a storage means for storing the information related to the data-array sequence. 
     
     
         9 . The method according to  claim 8 , wherein said storage means is a non-volatile writable memory. 
     
     
         10 . A method of making a three-dimensional offset-printed memory (3D-oP), comprising the steps of:
 1) forming a substrate circuit on a semiconductor substrate;   2) forming a memory level above said substrate, said memory level comprising first and second data-coding layers, wherein the data-pattern in said first data-coding layer is formed from a first portion of a data-mask, and the data-pattern in said second data-coding layer is formed from a second portion of said data-mask;   wherein said first and second portions are on a same data-mask.   
     
     
         11 . The method according to  claim 10 , wherein said substrate is aligned to a first position on said data-mask when forming the data-pattern in said first data-coding layer. 
     
     
         12 . The method according to  claim 11 , wherein said substrate is aligned to a second position on said data-mask when forming the data-pattern in said second data-coding layer. 
     
     
         13 . The method according to  claim 12 , wherein said second position is offset by a distance from said first position.  
     
     
         14 . The method according to  claim 10 , wherein the data-patterns are formed using photo-lithography or imprint-lithography. 
     
     
         15 . The method according to  claim 10 , wherein the data-pattern in said first data-coding layer represents a first bit. 
     
     
         16 . The method according to  claim 10 , wherein the data-pattern in said second data-coding layer represents a second bit. 
     
     
         17 . The method according to  claim 10 , wherein the total number of data-masks is fewer than the total number of data-coding layers. 
     
     
         18 . The method according to  claim 10 , wherein said 3D-oP further comprises a configurable-input/output (I/O) means for configuring the output of said memory based on the data-array sequence in said memory. 
     
     
         19 . The method according to  claim 18 , wherein said configurable-I/O means further comprises a storage means for storing the information related to the data-array sequence. 
     
     
         20 . The method according to  claim 19 , wherein said storage means is a non-volatile writable memory.