Magnetic-Field Sensing Device

Abstract

Apparatus and associated methods may relate to Magneto-Resistive Sensing Devices (MRSDs). In accordance with an exemplary embodiment, an MRSD comprises an underlying semiconductor device and a magneto-resistive sensor. In some exemplary embodiments, the semiconductor device is processed through most of a standard process flow. After the standard process flow, in various embodiments, a planarization step may be performed to create a more planar top surface. In some embodiments, the magneto-resistive material, which may be made from a Nickel-Iron alloy, called Permalloy, is deposited on the planar surface. A layer of interconnect metallization also may reside in this top region. The magneto-resistive material may contact the topmost layer of metallization of the semiconductor device via contact openings in the planarized surface. In some embodiments, the magneto-resistive material may similarly contact the topmost layer of metallization through these contact openings. The magneto-resistive material resides directly above the underlying circuitry.

1 - 20 . (canceled) 
     
     
         21 . A magnetic-field sensing device, comprising:
 a first region, comprising semiconductor devices on a substrate;   a second region disposed on the first region, comprising at least two vertically separated layers of interconnecting electrical paths; and   a third region disposed on the second region and comprising a magneto-resistive material disposed to vertically overlap and arranged in electrical communication with the semiconductor devices in the first region via the interconnecting electrical paths in the second region, wherein the first and second regions are separated by a first dielectric layer and the second and third regions are separated by a second dielectric layer,   wherein the magneto-resistive material is disposed directly on the second dielectric layer, and electrical communication between the magneto-resistive material and the semiconductor devices in the first region is made through one or more vias in the second dielectric layer that are filled with a non-magneto-resistive metal material.   
     
     
         22 . The device of  claim 21 , wherein the second region comprises at least three vertically separated layers of interconnecting electrical paths. 
     
     
         23 . The device of  claim 21 , wherein the semiconductor devices in the first region comprise CMOS transistors. 
     
     
         24 . The device of  claim 21 , wherein the semiconductor devices in the first region comprise bipolar transistors. 
     
     
         25 . The device of  claim 21 , wherein the semiconductor devices in the first region comprise both CMOS transistors and bipolar transistors. 
     
     
         26 . The device of  claim 21 , wherein the magneto-resistive material of the third region comprises Permalloy material. 
     
     
         27 . The device of  claim 21 , wherein the third region further comprises a layer of metal disposed to provide electrical connection to the topmost metal layer of the second region and to the magneto-resistive material of the third region. 
     
     
         28 . The device of  claim 21 , wherein the magneto-resistive material of the third region overlaps more than fifty percent of the underlying first region comprising semiconductor devices 
     
     
         29 . The device of  claim 21 , wherein the magneto-resistive material further comprises a layer of TaN disposed on top of a magnetic sensing layer.