US2016035733A1PendingUtilityA1

Semiconductor circuit structure

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Assignee: POWERCHIP TECHNOLOGY CORPPriority: Apr 6, 2012Filed: Oct 12, 2015Published: Feb 4, 2016
Est. expiryApr 6, 2032(~5.7 yrs left)· nominal 20-yr term from priority
Inventors:Shu-Cheng LinZih-Song WangYi-Shiang Chang
H10W 20/0633H10W 20/063H10P 50/71H10D 89/10H10D 30/021H01L 27/115H01L 27/0207H10B 69/00
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Claims

Abstract

A NAND flash circuit structure includes two select gates disposed on a substrate, and an even number of spaced-apart word lines disposed between the two select gates. The select gate is provided with a first portion and a second portion. The thickness of the first portion and the second portion are different.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A NAND flash circuit structure, comprising:
 a substrate;   two select gates disposed on said substrate; and   an even number of spaced-apart word lines disposed between said two select gates, wherein said select gate is provided with a first portion and a second portion, and the thickness of said first portion and said second portion are different.   
     
     
         2 . The NAND flash circuit structure according to  claim 1 , wherein said first portion is the middle portion of said select gate while said second portion is the bilateral portion of said select gate. 
     
     
         3 . The NAND flash circuit structure according to  claim 2 , wherein the thickness of said first portion is larger than the thickness of said second portion, and said select gate is in reverse-T shape. 
     
     
         4 . The NAND flash circuit structure according to  claim 3 , wherein the surface of said first portion of said select gate comprises a hard mask layer.

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